Commit graph

10539 commits

Author SHA1 Message Date
Samuel Pitoiset
0ac7f1888f radv: reduce the combined image/sampler desc size on GFX11+
From 96 to 64 due to the 32 bytes descriptor alignment.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36762>
2025-08-14 06:47:30 +00:00
Samuel Pitoiset
897201d710 radv: only write 32 bytes for combined image/sampler on GFX11+
It should be slightly more optimal.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36762>
2025-08-14 06:47:30 +00:00
Samuel Pitoiset
b6d093c4f5 radv: do not hardcode the combined image/sampler offset in the db path
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36762>
2025-08-14 06:47:30 +00:00
Samuel Pitoiset
f2b5446cc4 radv: use radv_write_sampler_descriptor() for combined image/sampler
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36762>
2025-08-14 06:47:29 +00:00
Samuel Pitoiset
3fb33aada6 radv: optimize the preprocess buffer size for DGC IES compute
Using the precomputed information.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36753>
2025-08-14 06:25:49 +00:00
Samuel Pitoiset
e527d2d801 radv: pre-compute more information when updating DGC IES
These information need to consider that pipelines/shaders in the same
IES struct might slightly differ. They will be used to determine the
preprocess buffer size in a better way.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36753>
2025-08-14 06:25:49 +00:00
Samuel Pitoiset
0db165ebda radv: pass the IES struct when computing the DGC sequence size
I completely missed that it's required for the application to pass the
IES struct in vkGetGeneratedCommandsMemoryRequirementsEXT. Also any
changes to the IES struct requires to call it again.

This will allow us to do more optimizations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36753>
2025-08-14 06:25:49 +00:00
Samuel Pitoiset
771d4b55e8 radv: remove redundant push constant size alignment for DGC
It's already aligned to 16 bytes when the pipeline layout is created.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36753>
2025-08-14 06:25:48 +00:00
Samuel Pitoiset
3359386145 radv: fix reserving space for emitting push constants with DGC IES
layout->push_constant_mask is only the DGC push constant mask (ie. the
tokens that are specified), but with IES all push constants are emitted
from the DGC shader. So it should be the total range of push constant.

This used to work by luck due to the preprocess buffer alignment.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36753>
2025-08-14 06:25:48 +00:00
Emma Anholt
9e61e72e9f vk/runtime: Set GPU_MULTI_WAIT on the drm syncobj type.
DRM syncobjs always let you wait repeatedly on them, so we can set the
flag in the core instead of having each driver override it once they try
to enable the emulated timeline semaphores.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36563>
2025-08-13 18:57:42 +00:00
Sagar Ghuge
7b634ebb63 vulkan/runtime: Add VK_SHADER_CREATE_UNALIGNED_DISPATCH_BIT_MESA flag
Drivers that doesn't support direct unaligned dispatches, they can use
the shader creation flag to lower unaligned dispatches.

Suggested-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36245>
2025-08-12 23:17:02 +00:00
Samuel Pitoiset
0d4d73a780 radv: implement an alternative workaround for HiZ on GFX12
This disables HiZ on-demand when both depth/stencil are enabled and
depth writes are enabled to prevent potential issues.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36739>
2025-08-12 13:48:10 +00:00
Samuel Pitoiset
b6a9ed48c9 radv: validate dynamic states earlier
This will be needed to emit the GFX12 alternative HIZ wa.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36739>
2025-08-12 13:48:10 +00:00
Samuel Pitoiset
3de108da66 radv/meta: update HiZ metadata after depth/stencil image clears
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36739>
2025-08-12 13:48:10 +00:00
Samuel Pitoiset
e6c485afb0 radv: initialize HiZ metadata during image layout transitions
This will allow us to enable HiZ for all levels of the image.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36739>
2025-08-12 13:48:10 +00:00
Samuel Pitoiset
297cf6f1aa radv/meta: add a pass to clear HiZ surfaces
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36739>
2025-08-12 13:48:09 +00:00
Samuel Pitoiset
8886a3385b radv: add a function to create an image view for HiZ surfaces
Only for storage because that's the only use case.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36739>
2025-08-12 13:48:09 +00:00
Samuel Pitoiset
d89922a6a8 radv: allocate image metadata to implement a workaround for HiZ on GFX12
This will be used to determine if HiZ can enabled per level.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36739>
2025-08-12 13:48:09 +00:00
Samuel Pitoiset
0c9f079295 radv/amdgpu: fix creation with different but unused RADV_PERFTEST flags
This fixes an issue with Hellblade Senua's Sacrifice because
RADV_PERFTEST_RT_WAVE_64 is set using drirc, but if two devices are
created RADV_PERFTEST flags might differ.

The proposed solution is to filter out unused RADV_PERFTEST flags for
the winsys.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36727>
2025-08-12 07:46:04 +00:00
Samuel Pitoiset
b2ea120732 ac,radv,radeonsi: fix programming PA_SU_PRIM_FILTER_CNTL on GFX12
GFX12 seems to behave slightly differently. Setting these bits to TRUE
causes zero-area triangles to not pass the primitive clipping stage.
So, the actual number of primitives output by the primitive clipping
stage was wrong.

After digging a lot, it seems PAL doesn't set these bits either on
GFX12.

CC: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36670>
2025-08-12 07:06:36 +00:00
Samuel Pitoiset
f23d211b16 radv: fix destroying CS with RADV_PERFTEST=dmashaders
Typo during this huge refactor with radv_cmd_stream.

Fixes: 3ccb48ec46 ("radv: switch to radv_cmd_stream everywhere")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36706>
2025-08-12 06:48:20 +00:00
Faith Ekstrand
6ece4f3fa0 vulkan: Add a vk_video_session_finish() helper
It's always better if init/finish come in pairs.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36646>
2025-08-11 20:34:56 +00:00
Faith Ekstrand
22a1f34728 radv: Delete radv_video_session_params
It was just a dummy wrapper around the runtime struct.  We do, however,
have to keep at least the Create/Update entrypoints because RADV has to
do some patching for video encode.  Since we're keeping Create, we keep
Destroy as well.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36646>
2025-08-11 20:34:56 +00:00
Faith Ekstrand
9d6f65db9a vulkan: Add handle casts for vk_video_session[_parameters]
This also allows us to simplify the interface to
vk_video_session_parameters_create().

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36646>
2025-08-11 20:34:56 +00:00
Faith Ekstrand
f8086c6472 vulkan/video: Switch vk_video_session_parameters to create/destroy
These are never created on the stack or deep inside other objects so it
makes sense to use create/destroy instead of init/finish.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36646>
2025-08-11 20:34:56 +00:00
Marek Olšák
d93156c2a2 ac: merge AC_ARG_INT & AC_ARG_FLOAT into single AC_ARG_VALUE
nothing uses the type anymore

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36696>
2025-08-11 15:32:30 -04:00
Marek Olšák
54fe9aa664 ac: simplify AC_ARG_CONST_*PTR enums
The pointer type doesn't matter anymore.

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36696>
2025-08-11 15:32:23 -04:00
Samuel Pitoiset
4580293ab2 radv: implement RB+ depth-only rendering for better perf
For RB+ depth-only, the following registers must be configured like:

 - CB_COLOR_CONTROL.MODE = CB_DISABLE
 - CB_COLOR0_INFO.FORMAT = COLOR_32
 - CB_COLOR0_INFO.NUMBER_TYPE = NUMBER_FLOAT
 - SPI_SHADER_COL_FORMAT.COL0_EXPORT_FORMAT = SPI_SHADER_32_R
 - SX_PS_DOWNCONVERT.MRT0 = SX_RT_EXPORT_32_R

This might increase performance for depth-only rendering passes on
GFX9+.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28590>
2025-08-11 09:45:15 +00:00
David Rosca
26d98d283b radv: Fix alignment for linear video decode dst images
OPTIMAL is actually linear for VCN4 and older, so this needs to check
the surface flags instead.

Fixes: 2d06b43292 ("radv: Enable tiling for video images on VCN5")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36669>
2025-08-11 09:25:18 +00:00
Samuel Pitoiset
9648d256db radv: remove cs parameter for gfx12 push SH reg helpers
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
It's also much cleaner now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36679>
2025-08-11 08:30:42 +00:00
Samuel Pitoiset
2c943b9bf8 radv: remove cs parameter for all opt context emit helpers
radeon_begin takes a radv_cmd_stream, so it's much cleaner now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36679>
2025-08-11 08:30:42 +00:00
Samuel Pitoiset
80678c7722 radv: cleanup some redundant cmd_buffer->cs occurrences
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36679>
2025-08-11 08:30:42 +00:00
Samuel Pitoiset
a520f75229 radv: move tracked registers to radv_cmd_stream
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36314>
2025-08-08 11:49:24 +00:00
Samuel Pitoiset
e2def79e2a radv: move context_roll_without_scissor_emitted to radv_cmd_stream
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36314>
2025-08-08 11:49:24 +00:00
Samuel Pitoiset
cc85f33b57 radv: move buffered registers for GFX12 to radv_cmd_stream
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36314>
2025-08-08 11:49:23 +00:00
Samuel Pitoiset
3ccb48ec46 radv: switch to radv_cmd_stream everywhere
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36314>
2025-08-08 11:49:23 +00:00
Samuel Pitoiset
5982e8f331 radv: introduce radv_cmd_stream
radeon_cmdbuf is too low level for stuff like tracked registers and
buffered registers on GFX11+.

This commit introduces radv_cmd_stream which is defined like:

struct radv_cmd_stream {
   struct radeon_cmdbuf *b;
   // TODO: add tracked regs
   // TODO: add buffered regs
};

It will be much easier/cleaner to implement tracked/buffered registers
with this new structure.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36314>
2025-08-08 11:49:23 +00:00
Samuel Pitoiset
8078acc205 radv: tidy up radv_device_init_perf_counters()
radeon_winsys_cs is just a relic at this point.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36314>
2025-08-08 11:49:22 +00:00
David Rosca
9491ea761f radv/video: Use more common defines
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36645>
2025-08-08 09:22:54 +00:00
David Rosca
532eb40404 radv/video: Remove unused enum
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36645>
2025-08-08 09:22:54 +00:00
David Rosca
c904796350 radv/video: Simplify vp9 q params
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36645>
2025-08-08 09:22:53 +00:00
David Rosca
27dec41c81 radv/video: Don't init vp9 probs table in message buffer
This is needed in context buffer, but message buffer only uses the
segmentation data.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36645>
2025-08-08 09:22:53 +00:00
David Rosca
142d54817a radv: Add timeout to video encode query
Reviewed-by: Dave Airlie <airlied@redhat.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36645>
2025-08-08 09:22:52 +00:00
Samuel Pitoiset
2e51b50db2 radv: regroup CB related states emission together
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31659>
2025-08-08 08:16:26 +00:00
Samuel Pitoiset
fa677ca0c3 radv: track more CB related context registers on < GFX12
The tracked registers mechanism isn't used yet on GFX12.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31659>
2025-08-08 08:16:25 +00:00
Samuel Pitoiset
6a170c5de1 radv: precompute color blend equations
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31659>
2025-08-08 08:16:25 +00:00
Samuel Pitoiset
52589ed1e9 radv: precompute the mask for color write attachments
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31659>
2025-08-08 08:16:25 +00:00
Samuel Pitoiset
43cc048deb radv: precompute the mask for enabled color writes
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31659>
2025-08-08 08:16:24 +00:00
Konstantin Seurer
c4b18c689f radv: Emit compressed primitive nodes on GFX12
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Emits two triangles per node whenever possible. The nir code will
revisit the triangle node to handle the second triangle only if both
triangles are interescted by the ray.

Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35734>
2025-08-07 20:23:15 +00:00
Konstantin Seurer
fb83a5793a radv/rra/gfx12: Handle compressed primitive nodes
Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35734>
2025-08-07 20:23:15 +00:00