Commit graph

223990 commits

Author SHA1 Message Date
Alyssa Rosenzweig
09df2ee2ba nir/opt_sink: sink more Intel block instructions
Results on my jay branch

SIMD16:
   Totals from 1456 (55.01% of 2647) affected shaders:
   Instrs: 2119110 -> 2116320 (-0.13%); split: -0.23%, +0.10%
   CodeSize: 29561972 -> 29460340 (-0.34%); split: -0.47%, +0.13%

SIMD32:
   Totals from 1462 (55.23% of 2647) affected shaders:
   Instrs: 2421472 -> 2422930 (+0.06%); split: -0.20%, +0.26%
   CodeSize: 34434240 -> 34415840 (-0.05%); split: -0.33%, +0.28%
   Number of fill instructions: 29830 -> 29829 (-0.00%); split: -0.01%, +0.00%

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42102>
2026-06-09 12:16:57 +00:00
Sagar Ghuge
3da4653d46 jay: Implement halt
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Halt needs to be always in pair. First halt issued will mask off active
channels and second one will basically re-enable those masked off
channels.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42067>
2026-06-09 11:47:33 +00:00
Samuel Pitoiset
36f3175187 radv/amdgpu: defer allocating the NULL PRT BO
To avoid wasting VRAM when emulated sparse residency isn't used.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41883>
2026-06-09 11:13:35 +00:00
Samuel Pitoiset
887a390ec0 radv: advertise VK_KHR_shader_abort
Without VK_KHR_device_fault there is no way to get back the abort
messages.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40723>
2026-06-09 10:33:12 +00:00
Samuel Pitoiset
982f9312bd radv: implement VK_KHR_shader_abort
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40723>
2026-06-09 10:33:11 +00:00
Samuel Pitoiset
6fe7fdb100 aco: emit nir_jump_halt
To halt execution by setting FATAL_HALT.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40723>
2026-06-09 10:33:11 +00:00
squidbus
371ed09659 kk: Work around crash with multiple concurrent MTL4Compiler
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Using multiple `MTL4Compiler` instances concurrently may result in
the process crashing from within the Metal driver. Work around this
by maintaining one `MTL4Compiler` per `MTLDevice`.

Reviewed-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41842>
2026-06-09 02:47:38 -07:00
squidbus
6a25e3a0b0 kk: Migrate to Metal 4 pipelines
Enables using new features that are only available with Metal 4 pipelines,
and fixes Metal validation errors from depth/stencil format mismatches
between pipeline and render pass attachments due to differences in strictness
between Metal and Vulkan.

Reviewed-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41842>
2026-06-09 02:47:31 -07:00
squidbus
9cbda0fd60 kk: Enable shaderTessellationAndGeometryPointSize
Supported with the proper hardware vertex stage lowering.

Reviewed-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42020>
2026-06-09 09:07:03 +00:00
squidbus
9b587e5ff1 kk: Ensure some vertex lowerings happen on hardware stage
Lowerings like ensuring correct point size outputs, vertex position
output, and clip space control are expected to happen on the shader
stage which becomes the vertex stage on the actual hardware.

Reviewed-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42020>
2026-06-09 09:07:03 +00:00
Ganesh Belgur Ramachandra
859a7f5436 amd/llvm: truncate const intergers to bitwidth
Fixes assertion checks in LLVM APInt's constructor
when value cannot fit the interger bitwidth

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41822>
2026-06-09 08:36:50 +00:00
Ganesh Belgur Ramachandra
bf3333156e amd/llvm: fix LLVM asserts for signed integer constants
After LLVM APInt's refactor, stricter checks for
integer signedness are imposed. If a sign extended
uint64_t is passed to LLVMConstInt(...) producing
a value much larger than uintNmax for N < 64,
then LLVM complains.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41822>
2026-06-09 08:36:50 +00:00
Ganesh Belgur Ramachandra
7e7f6e79ec amd/llvm: fix target feature setting (DumpCode -> dumpcode)
Refer changes made to AMDGPU backend of llvm-project
in commit 4b1cfc5d7c606ece125d1e0ef6d13e0289553200

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41822>
2026-06-09 08:36:50 +00:00
squidbus
6b06f70af0 kk: Remove unused deprecated Metal APIs
Some checks are pending
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Reviewed-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42096>
2026-06-09 07:17:29 +00:00
Collabora's Gfx CI Team
9c424edd2e Uprev VVL to 2ab77a01659e3e46d6ca8a25425b19b3425adb11
d2b091858d...2ab77a0165

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42010>
2026-06-09 06:33:06 +00:00
Yiwei Zhang
936ceed0a6 anv: amend missing shader dump finish upon device destruction
Fixes: 0a965c0bce ("anv: add a shader-dump debug option")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42095>
2026-06-09 06:00:14 +00:00
Emma Anholt
fbd9c67e2a drm-shim/freedreno: Fix VM_BIND support.
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We need to initialize the out fence.  This was supposed to be in the
merged code, but I failed to force-push before marging.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42103>
2026-06-09 03:39:42 +00:00
Christian Meissl
9da4fb526a nir/lower_tex: skip external texture YUV lowering for query instructions
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Guard external texture lowering by !nir_tex_instr_is_query(), matching
the pattern already used by swizzle_result and lower_srgb.

Fixes textureSize() on samplerExternalOES on panfrost, which triggers
the assertion:

```
Invalid invariant idx.type == BI_INDEX_REGISTER:
	   r10 = TEX_SINGLE.rgb.2d.f32.zero_lod _.h00, ^r10, ^r11, sr_count:0
```

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41454>
2026-06-09 01:26:45 +00:00
Karol Herbst
9d858b6719 rusticl/program: implement CL_PROGRAM_BUILD_LOG without a copy
Some checks are pending
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Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42021>
2026-06-09 00:38:10 +00:00
Karol Herbst
fed9ea7aa7 rusticl/program: implement CL_PROGRAM_BUILD_OPTIONS without a copy
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42021>
2026-06-09 00:38:10 +00:00
Karol Herbst
23295a7f3e rusticl/program: store build options as CString
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42021>
2026-06-09 00:38:10 +00:00
Karol Herbst
6abe48d835 rusticl/program: set __OPENCL_C_VERSION__ ourselves
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42021>
2026-06-09 00:38:10 +00:00
Karol Herbst
7aa9a36ade rusticl/program: move -cl-std handling inside CompileOptions::get_clang_args
Also ignore empty options while at it, because that can now happen and
makes other part of the code upset.

Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42021>
2026-06-09 00:38:10 +00:00
Karol Herbst
d1482321ae rusticl/program: handle -create-library inside CompileOptions::new
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42021>
2026-06-09 00:38:09 +00:00
Karol Herbst
13511279c9 rusticl/program: turn iter map into loop inside CompileOptions::new
Otherwise error handling is going to be painful later on.

Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42021>
2026-06-09 00:38:08 +00:00
Karol Herbst
1e41c73cf5 rusticl/program: construct __OPENCL_VERSION__ inside CompileOptions::get_clang_args
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42021>
2026-06-09 00:38:08 +00:00
Karol Herbst
73b3d81a48 rusticl/program: add CompileOptions::get_clang_args
Soon we'll parse the options earlier where we don't target a specific
device yet, so we need to be able to generate the clang arguments on the
fly after parsing.

Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42021>
2026-06-09 00:38:08 +00:00
Karol Herbst
33f6c01caa rusticl/util: add CStrExt::from_ptr_or_empty
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42021>
2026-06-09 00:38:08 +00:00
Karol Herbst
23b0d9c6f7 rusticl/util: add CStrExt trait
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42021>
2026-06-09 00:38:08 +00:00
Karol Herbst
890a51c207 rusticl/program: print compiler output as Rust string
The CString Debug implementation does not handle new lines, so it gets all
printed as a single row, which is not what we want at all.

Fixes: 01de0ff26f ("rusticl/program: store log as a CString")
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42021>
2026-06-09 00:38:07 +00:00
Alyssa Rosenzweig
8150ce8531 anv: enable jay ray query
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42006>
2026-06-08 23:57:46 +00:00
Calder Young
4aca86b383 jay: Implement ray tracing trace intrinsics
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42006>
2026-06-08 23:57:46 +00:00
Calder Young
667a330512 jay: Implement ray tracing topology id intrinsics
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42006>
2026-06-08 23:57:46 +00:00
Calder Young
576fc784c9 jay: Disable SIMD32 if ray queries are used
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42006>
2026-06-08 23:57:46 +00:00
Alyssa Rosenzweig
773a0e71ce jay/lower_pre_ra: allow immediate on bfe
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42006>
2026-06-08 23:57:46 +00:00
Calder Young
03bff227db brw: Move topology id helper intrinsics to NIR
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42006>
2026-06-08 23:57:46 +00:00
Calder Young
9f2c6fdca4 brw: Move ray payload bitfield generation to NIR
This will save us the trouble of faking constant folding for the BVH level and
trace ray control values when we lower this intrinsic in the new backends.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42006>
2026-06-08 23:57:46 +00:00
Alyssa Rosenzweig
2a1588c09e bin: add drm-shim script
Add a script to run whatever you want under drm-shim given only a driver name,
CI job name or GPU model, plus the option to dump assembly with a common option.
This lets people debugging common code easily run shader-db or whatever with
whatever they want without needing to look up a million driver specific
options/paths/etc.

Must run inside a meson devenv. Example usage (path symlinked):

  drm-shim --disasm glk ./run shaders/glmark/1-1.shader_test
  drm-shim --disasm asahi ./run shaders/glmark/1-1.shader_test
  drm-shim --disasm panfrost-t860 ./run shaders/glmark/1-1.shader_test
  drm-shim --disasm zink-radv-navi31-valve ./run shaders/glmark/1-1.shader_test

Makes for a fun compilerexplorer like tool too

Reduces amount of docs needed for https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41959

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42055>
2026-06-08 23:07:43 +00:00
Rob Clark
b340a00c29 tu: Un-open-code RB_A2D_PIXEL_CNTL
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Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42089>
2026-06-08 22:21:40 +00:00
Rob Clark
bc45a27323 freedreno/a6xx: Un-open-code RB_A2D_PIXEL_CNTL
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42089>
2026-06-08 22:21:39 +00:00
Rob Clark
b13abd08f2 freedreno/registers: Add RB_RESOLVE_CNTL_0.YUV_PLANE_ID
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42089>
2026-06-08 22:21:39 +00:00
Rob Clark
aea956a25f freedreno/registers: Improve A2D docs
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42089>
2026-06-08 22:21:39 +00:00
Rob Clark
88210dfcf5 freedreno/a6xx: Push RB_A2D_PIXEL_CNTL magic into blitter
This is about partial (only z or only s) z24s8 blits.  Just push the
buffers mask down to blitter to consolidate the magic.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42089>
2026-06-08 22:21:39 +00:00
Yiwei Zhang
301a1f9a61 anv: fix lock scope in anv_ensure_fp64_shader
Fixes: 7d3b62e13d ("anv: only load fp64 software shader when needed")
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42094>
2026-06-08 21:55:45 +00:00
Jason Macnak
e0646b3b83 gfxstream: kumquat: validate device dmabuf support before use
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42091>
2026-06-08 21:38:19 +00:00
Paulo Zanoni
547432e85a intel/blorp: don't include "util/format_rgb9e5.h"
We don't use anything from that header. We call
nir_format_pack_r9g9b9e5(), which comes from nir_format_convert.h,
which we already include.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41976>
2026-06-08 21:18:47 +00:00
Paulo Zanoni
0d8f487e06 intel/blorp: move struct blorp_blit_prog_key to blorp_blit.c
The key is only used inside that file. Make it like we do with the
keys in blorp_clear.c.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41976>
2026-06-08 21:18:47 +00:00
Paulo Zanoni
081dd1db75 intel/blorp: fix blorp base key initialization
When you use designated initializers, anything that is not explicitly
set is set to zero. When you do something like:

  struct blorp_blit_prog_key {
    .base = BLORP_BASE_KEY_INIT(BLORP_SHADER_TYPE_BLIT),
    .base.shader_pipeline = BLORP_SHADER_PIPELINE_RENDER,
  };

the second initialization is the only one that does something: it sets
shader_pipeline to the desired value, and all the other fields in
"base" are set to 0. This is easily verifiable by just examining the
contents of all the blorp keys we initialize this way: name and
shader_type are always zero.

This means that if two blorp shaders of different types have the
same key size, the shader cache could confuse them. Still, I don't
think this is happening in the real world.

Fixes: 22ecb4a10f ("intel/blorp: Support compute for slow clears")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/work_items/11690
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41976>
2026-06-08 21:18:46 +00:00
Paulo Zanoni
ed098570bc intel/blorp: don't silently ignore compilation failures
If we fail to compile a Kernel, don't silently fail: call mesa_loge()
so we can at least know it happened. On debug builds, just assert(),
so if they ever happen in CI, we'll know.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41976>
2026-06-08 21:18:46 +00:00
Mike Blumenkrantz
824518737a zink: always return DMA_BUF type handles from resource_get_handle
Some checks are pending
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OPAQUE_FD here was a historical remnant (9fa7400564)
from before zink actually handled dmabufs, but now that it does,
use dmabuf for exports since that's what is actually desired

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42092>
2026-06-08 19:41:41 +00:00