Commit graph

201327 commits

Author SHA1 Message Date
Lionel Landwerlin
b3f487bd0d anv: fix even set/reset on blitter engine
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31928>
2024-11-06 12:20:22 +00:00
Connor Abbott
423d472a4e tu: Re-emit visibility stream before each render pass
When we set the visibility stream with CP_SET_PSEUDO_REG, it does two
things (or only one of the two, with concurrent binning):

- Set the "pseudo register" used by CP_SET_BIN_DATA5_OFFSET, which in
  turn is used when decoding the vis. streams.
- Set the VSC register used by the binning pass.

Preemption with skipsaverestore obliterates the second, but not the
first. This means that before running the binning pass, we have to
re-emit these registers. I *think* this is what the blob does on a7xx.
On a6xx, where the pseudo register doesn't exist, the blob seems to
re-emit the preamble every time we re-allocate the visibility streams,
but we don't support a6xx yet so we can defer making that decision.

Fixes supertuxkart under zink with preemption enabled in the kernel.

Fixes: 1d2b479a3b ("tu: Allow being preempted on a7xx")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31937>
2024-11-06 11:55:28 +00:00
Lionel Landwerlin
2cadab5dcf vulkan/runtime: fix allocation failure handling
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 93d0c66b27 ("vulkan/pipeline_cache: Add helpers for storing NIR in the cache")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31982>
2024-11-06 11:23:27 +00:00
Rhys Perry
5375d77488 aco: wait for scratch stores to complete before dealloc_vgprs
fossil-db (navi31):
Totals from 392 (0.49% of 79395) affected shaders:
Instrs: 5052043 -> 5054100 (+0.04%)
CodeSize: 26701200 -> 26709428 (+0.03%)
Latency: 43614861 -> 43615368 (+0.00%)
InvThroughput: 7353147 -> 7353216 (+0.00%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24884>
2024-11-06 09:58:05 +00:00
Rhys Perry
575f24d19f aco: don't emit early exit over dealloc_vgprs
fossil-db (navi31):
Totals from 3308 (4.17% of 79395) affected shaders:
Instrs: 387145 -> 375373 (-3.04%)
CodeSize: 2018276 -> 1964380 (-2.67%)
Latency: 6588004 -> 6549068 (-0.59%)
InvThroughput: 458792 -> 457025 (-0.39%); split: -0.39%, +0.00%
Branches: 10710 -> 7402 (-30.89%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24884>
2024-11-06 09:58:05 +00:00
Rhys Perry
295b7d606f aco: insert NOP before dealloc_vgpr in the insert_NOPs pass
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24884>
2024-11-06 09:58:05 +00:00
Rhys Perry
4dfc564669 aco: fix printing of block_kind_discard_early_exit
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24884>
2024-11-06 09:58:04 +00:00
Rhys Perry
0ad713ca9f aco: add waitcnt build helper
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24884>
2024-11-06 09:58:04 +00:00
Eric Engestrom
4ec045a533 ci: bump ci-templates
debian/x86_64_build-base was missing the package that provides
LLVMConfig.cmake, breaking cmake builds that need LLVM, like the
SPIRV-LLVM-Translator build.

The cross-builds were missing arch-test to allow dpkg to figure out
which arch it's running on.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31940>
2024-11-06 07:53:21 +00:00
Eric Engestrom
18b5108a3d ci: don't replace ld with ld.gold if ld.gold doesn't exist
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31940>
2024-11-06 07:53:21 +00:00
Eric Engestrom
7a89e7afe3 ci: properly quote ccache dir and path
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31940>
2024-11-06 07:53:21 +00:00
Timur Kristóf
766617e8da radv: Enable NGG culling by default on GFX10.
We never took the time to actually test this, but it works fine.
Improves performance on Navi 10 in the following test cases:

Baldur's Gate 3 Vulkan: up to 10%
Witcher 3 D3D11: around 4%
Granite primitive stress test: 107%
FSR2 sample app: 57%

Notes:
NGG is still disabled on Navi 14.
Not tested on Navi 12.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31971>
2024-11-06 03:16:54 +00:00
Timur Kristóf
6bf19b2d70 radv: Increase NGG culling PS param limit to 12 on GFX10.
Helps performance in Baldur's Gate 3 on Navi 10
when NGG culling is enabled.

Also fix the description of the RADV_PERFTEST=nggc env var.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31971>
2024-11-06 03:16:53 +00:00
Matt Turner
5068a6b4ce anv: Set shader_spilling_rate=11
This has the best fossil-db results across in a sweep from 0..15.

fossil-db results on Alderlake:

Instructions in all programs: 152849904 -> 152824116 (-0.0%)
SENDs in all programs: 7677830 -> 7677830 (+0.0%)
Loops in all programs: 48470 -> 48470 (+0.0%)
Cycles in all programs: 11988670382 -> 11987530942 (-0.0%)
Spills in all programs: 42863 -> 41777 (-2.5%)
Fills in all programs: 77114 -> 73044 (-5.3%)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31990>
2024-11-06 02:47:26 +00:00
Evan
c3c80491f9 amd/vpelib: Input Format Adjustment
Reviewed-by: Jiali Zhao <Jiali.Zhao@amd.com>
Reviewed-by: Jesse Agate <Jesse.Agate@amd.com>
Acked-by: Chenyu Chen <Chen-Yu.Chen@amd.com>
Signed-off-by: Evan <evan.damphousse@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31918>
2024-11-06 02:19:39 +00:00
Chang, Tomson
d1b790c028 amd/vpelib: Fix color fill performance issue on VPE1.1 (#419)
\[WHY\]
For color fill only case we see performance on Vpe1.1 are not doubled due
to CD are all 0, no odd CD

\[HOW\]
1. Dummy stream dst rect should be in the middle of target rect so the
two (dummy seg + bg only seg) are balanced, instead of target at upper
left corner which makes it imbalance
2. BG gap generation should consider more for collaboration mode
num_multiple
3. When pure bg case, skip dummy stream handling and go ahead do BG gap
generation
4. Update memory requirement for the new pure BG case flow to avoid run out of embedded buffer
4. Additional -- fix the random Collaborate data generation bug (benign)

\[TESTING\]
Vpelibtest app + nv12torgb case with debug flag bgcolorfill set on in
vpelibtestapp
Media player with/without bgcolorfillonly flag
Teams

Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Reviewed-by: Navid Assadian <Navid.Assadian@amd.com>
Acked-by: Chenyu Chen <Chen-Yu.Chen@amd.com>
Signed-off-by: Tomson Chang <tomson.chang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31918>
2024-11-06 02:19:39 +00:00
Visan, Tiberiu
4661bf3659 amd/vpelib: Remove TODO comments and legacy check(#421)
\[WHY\]
1.Remove TODO comments that don't need action item
2.Delete the legacy command number check as it is now using a vector (i.e. without hard limit)

\[HOW\]
Remove TODO comments and delete the legacy command number check

Signed off by <tvisan@amd.com>

Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Reviewed-by: Jesse Agate <Jesse.Agate@amd.com>
Acked-by: Chenyu Chen <Chen-Yu.Chen@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31918>
2024-11-06 02:19:39 +00:00
Chenyu Chen
e0754a6dc7 amd/vpelib: Remove unused define macro
Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Acked-by: Chenyu Chen <Chen-Yu.Chen@amd.com>
Signed-off-by: Chenyu Chen <Chen-Yu.Chen@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31918>
2024-11-06 02:19:39 +00:00
Kenneth Graunke
22b511ef02 intel: Set shader_spilling_rate=11 in intel_clc
A while back Matt enabled shader_spilling_rate by default for anv.
But intel_clc doesn't use the driconf mechanism that we use there.

The GRL shaders spill a lot, and with us now compiling additional
generations of the shaders, Mesa build time is getting prohibitively
expensive.  By setting this, we drop the time taken for a clean debug
build by approximately 35% on my current laptop.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31993>
2024-11-06 01:57:10 +00:00
Gurchetan Singh
a6d4274822 gfxstream: update Kumquat API
crrev.com/c/5980832 is updating kumquat api .. it's not
distro-packaged and used as a testing tool.  For the
mechanism it is used (GfxstreamEnd2EndTests build target
in AOSP), this API change will not be disruptive.

Reviewed-by: Aaron Ruby <aruby@blackberry.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31929>
2024-11-05 16:28:56 -08:00
Bo Hu
21a07e850c gfxstream: global_state_wrapped_decoding of vkCreateComputePipelines
Similar to vkCreateGraphicsPipelines, this
function also need to be wrapped.

Reviewed-by: Aaron Ruby <aruby@blackberry.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31929>
2024-11-05 16:28:56 -08:00
Serdar Kocdemir
e53a2c7474 gfxstream: Allow VK_KHR_line_rasterization
Allow KHR version of the line_rasterization extension to be
supported from the guest side.

Test: dEQP-VK.dynamic_state.monolithic.line_width.*

Reviewed-by: Aaron Ruby <aruby@blackberry.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31929>
2024-11-05 16:28:56 -08:00
Serdar Kocdemir
6912c95efe gfxstream: Keep VK_EXT_line_rasterization for codegen
Codegen does not automatically generate code for promoted
extensions, so we need to explicitly define support for
VK_EXT_line_rasterization to generate necessary code.

Reviewed-by: Aaron Ruby <aruby@blackberry.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31929>
2024-11-05 16:28:56 -08:00
sergiuferentz
72dbabdfef gfxstream: VulkanBatchedDescriptorSetUpdate toggled on caps on Guest
The descriptor set optimization doesn't seem to help performance
during benchmarks and it seems to cause erratic behaviour during normal
operation. This disables it from being on by default.
Can be enabled by -feature VulkanBatchedDescriptorSetUpdate

Reviewed-by: Aaron Ruby <aruby@blackberry.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31929>
2024-11-05 16:28:54 -08:00
nyanmisaka
e3a0091638 intel/pci_ids: Update DG1 device names
Ref: 9097b19c3c/shared/source/dll/devices/devices_base.inl (L43-L46)
Ref: https://ark.intel.com/content/www/us/en/ark/products/codename/195485/products-formerly-dg1.html
Ref: https://www.intel.com/content/www/us/en/content-details/682687/2020-discrete-gpu-formerly-named-dg1-programmer-s-reference-manual-configurations.html?wapkw=0x4905
Ref: bspec 44463
Signed-off-by: nyanmisaka <nst799610810@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30760>
2024-11-05 22:14:04 +00:00
nyanmisaka
b777e433c3 intel/pci_ids: Update TGL device names
Ref: 9097b19c3c/shared/source/dll/devices/devices_base.inl (L96-L97)
Ref: https://www.intel.com/content/www/us/en/products/sku/208659/intel-core-i51140g7-processor-8m-cache-up-to-4-20-ghz-with-ipu/specifications.html?wapkw=0x9a40
Ref: https://www.intel.com/content/www/us/en/products/sku/208660/intel-core-i51145g7-processor-8m-cache-up-to-4-40-ghz-with-ipu/specifications.html?wapkw=0x9a49
Signed-off-by: nyanmisaka <nst799610810@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30760>
2024-11-05 22:14:04 +00:00
nyanmisaka
e39deb7700 intel/pci_ids: Update RPL device names
Ref: 9097b19c3c/shared/source/dll/devices/devices_base.inl (L166-L169)
Ref: https://www.intel.com/content/www/us/en/products/sku/232175/intel-core-i71370pe-processor-24m-cache-up-to-4-80-ghz/specifications.html?wapkw=0xa7a0
Ref: https://www.intel.com/content/www/us/en/products/sku/232143/intel-core-i51334u-processor-12m-cache-up-to-4-60-ghz/specifications.html?wapkw=0xa7a1
Signed-off-by: nyanmisaka <nst799610810@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30760>
2024-11-05 22:14:04 +00:00
nyanmisaka
eb98962eab intel/pci_ids: Update ADL device names
Ref: 9097b19c3c/shared/source/dll/devices/devices_base.inl (L154-L156)
Ref: https://www.intel.com/content/www/us/en/products/sku/132215/intel-core-i912900hk-processor-24m-cache-up-to-5-00-ghz/specifications.html?wapkw=0x46a6
Ref: https://www.intel.com/content/www/us/en/products/sku/230905/intel-core-i71265ul-processor-12m-cache-up-to-4-80-ghz/specifications.html?wapkw=0x46a8
Ref: https://www.intel.com/content/www/us/en/products/sku/226454/intel-core-i71250u-processor-12m-cache-up-to-4-70-ghz/specifications.html?wapkw=0x46aa
Signed-off-by: nyanmisaka <nst799610810@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30760>
2024-11-05 22:14:04 +00:00
Georg Lehmann
8104c89174 nir/lower_wpos_ytransform: remove reference to long removed TGSI code
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31951>
2024-11-05 21:42:37 +00:00
Georg Lehmann
e307f40ebe nir/lower_wpos_ytransform: use more typical pass structure
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31951>
2024-11-05 21:42:37 +00:00
Georg Lehmann
a948c9a3eb nir/lower_wpos_ytransform: clean up wpos_adjustment
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31951>
2024-11-05 21:42:37 +00:00
Georg Lehmann
b5d6b31cc5 nir/lower_wpos_ytransform: clean up sample_pos
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31951>
2024-11-05 21:42:37 +00:00
Georg Lehmann
807b267c4d nir/lower_wpos_ytransform: clean up baryc_at_offset
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31951>
2024-11-05 21:42:37 +00:00
Georg Lehmann
5d8adf92e7 nir/lower_wpos_ytransform: remove redundant state shader
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31951>
2024-11-05 21:42:37 +00:00
Georg Lehmann
63f828d262 nir/lower_wpos_ytransform: remove unnecessary state variable
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31951>
2024-11-05 21:42:37 +00:00
Georg Lehmann
3738c69796 nir/opt_frag_coord_to_pixel_coord: optimize trunc/floor
Foz-DB Navi21:
Totals from 207 (0.26% of 79206) affected shaders:
MaxWaves: 5924 -> 5980 (+0.95%)
Instrs: 83164 -> 83144 (-0.02%); split: -0.06%, +0.04%
CodeSize: 457296 -> 459092 (+0.39%); split: -0.00%, +0.39%
VGPRs: 5336 -> 5160 (-3.30%)
Latency: 1308811 -> 1307754 (-0.08%); split: -0.16%, +0.08%
InvThroughput: 232768 -> 222979 (-4.21%); split: -4.21%, +0.00%
VClause: 1359 -> 1370 (+0.81%); split: -0.07%, +0.88%
SClause: 3300 -> 3293 (-0.21%); split: -0.24%, +0.03%
Copies: 4992 -> 4985 (-0.14%); split: -0.56%, +0.42%
PreVGPRs: 3757 -> 3619 (-3.67%)
VALU: 58366 -> 58338 (-0.05%); split: -0.08%, +0.03%

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31966>
2024-11-05 21:09:45 +00:00
Eric Engestrom
62011e564c ci/b2c: make dut boot quieter on ci-tron jobs
!31602 but for b2c jobs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31939>
2024-11-05 20:30:22 +00:00
Eric Engestrom
c8f5477685 ci/b2c: properly escape double-quoted container command
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31939>
2024-11-05 20:30:22 +00:00
Eric Engestrom
b76b53cbbb ci: rename state_x to previous_state_x to be clear about what it contains
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31939>
2024-11-05 20:30:22 +00:00
Eric Engestrom
d69bd58365 ci: consistently restore -x after temporarily disabling it
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31939>
2024-11-05 20:30:22 +00:00
Eric Engestrom
4a19f7d53d ci: initialize state_x (tracking set -x)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31939>
2024-11-05 20:30:21 +00:00
Eric Engestrom
4fa1730cdd ci: only end current section if there is a current section
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31939>
2024-11-05 20:30:21 +00:00
José Roberto de Souza
a991935088 anv: Enable perf metrics id set syncronization
Now actually making use of new Xe KMD OA syncronization uAPI.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31283>
2024-11-05 19:25:53 +00:00
José Roberto de Souza
953abc7d1e intel/perf: Add INTEL_PERF_FEATURE_METRIC_SYNC and check if KMD supports it
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31283>
2024-11-05 19:25:53 +00:00
José Roberto de Souza
a38a98c4cb intel/perf: Extend intel_perf_stream_set_metrics_id() to syncronize metrics id changes
Xe KMD added a uAPI to syncronze metrics id changes, so we can make
it wait for all previous workloads in exec_queue and all previous
metrics id changes to finish before start change it again.
This should make Vulkan queries more robust.

So this makes use of intel_bind_timeline to syncronize the metrics id
changes and xe_queue_get_syncobj_for_idle() to syncronize with
exec_queue.

As i915 and some versions of Xe KMD will not support it, this feature
will only be used then intel_bind_timeline parameter is not NULL and
timeline has a valid syncobj id.
At this patch level all callers will set it to NULL, next patch will
add and initialize timeline in ANV when supported by Xe KMD.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31283>
2024-11-05 19:25:53 +00:00
José Roberto de Souza
3e6546f662 drm-uapi: Sync xe_drm.h
Sync with:
commit 086ed1d51544bfc1123b93eccc2ae88e0fbf3d51
Merge: fb6c5b1fdc 53f4b30b05
Author: Dave Airlie <airlied@redhat.com>

    Merge tag 'exynos-drm-next-for-v6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31283>
2024-11-05 19:25:53 +00:00
David Rosca
764b316623 radeonsi/vcn: Rework encode padding and session init params
Move the session init params into common code, instead of having the
same code copied for each VCN version.
Change the padding logic to enforce minimum padding required for input
surface (in case the input surface is smaller than aligned coded size)
and also avoid setting the padding above supported maximum.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31975>
2024-11-05 18:53:16 +00:00
David Rosca
16281f29fb radeonsi/vcn: Gracefully handle encode errors and report to frontend
Previously it would show error message and then most likely crash later.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31975>
2024-11-05 18:53:16 +00:00
David Rosca
41964a5f2b radeonsi/vcn: Don't try to override HEVC SPS conformance window
No point doing this as the padding is set according to the conformance
window anyway.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31975>
2024-11-05 18:53:16 +00:00
Pavel Ondračka
ef8772e9bf ci: disable ondracka farm
Its broken at the moment due to ci-tron gateway iPXE issues.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31984>
2024-11-05 16:00:30 +00:00