Commit graph

201327 commits

Author SHA1 Message Date
Pierre-Eric Pelloux-Prayer
1021d6fe62 dri: deal with ARGB1555
This helps fixing "glx-visuals-... -pixmap" which uses this
format.

cc: mesa-stable

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33036>
2025-01-21 14:33:13 +00:00
Pierre-Eric Pelloux-Prayer
910c18df6c dri: use _checked variants of xcb requests
Requests with no reply will report errors by default to the event
loop, which then usually cause the not very useful log like this
to be printed:

X Error of failed request:  BadAlloc (insufficient resources for operation)
  Major opcode of failed request:  149 ()
  Minor opcode of failed request:  2
  Serial number of failed request:  33
  Current serial number in output stream:  34

This commit introduce some helpers to handle the xcb errors in Mesa,
and be able to report errors properly.
For instance the same error will now log:

MESA: error: dri3_alloc_render_buffer:1634 xcb_dri3_pixmap_from_buffer[s] failed
MESA: error: X error: 11

It's not fixing the underlying issue, but at least now tests like
"glx-visuals-stencil -pixmap" and "glx-visuals-depth pixmap" fail
properly.

cc: mesa-stable

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33036>
2025-01-21 14:33:13 +00:00
Pierre-Eric Pelloux-Prayer
b307951648 glx: fix glx-create-context-invalid-es-version
* GLES3.x is only valid for x <= 2
* The expected error is GLXBadProfileARB, not BadValue

cc: mesa-stable

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33036>
2025-01-21 14:33:13 +00:00
Martin Roukala (né Peres)
e536ed0824 freedreno/ci: use the boot watchdog to ensure the a750 boots
This allows us to drop the reboot condition on SaharaMode which means
that every time the reboot pattern is hit, it is due to a test
execution issue (GPU hang) and not something unrelated to the job.

Additionally, this allows us to try booting up to 5 times which should
help boot reliability.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Reviewed-by: Eric Engestrom <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32572>
2025-01-21 12:46:31 +00:00
Martin Roukala (né Peres)
047d3953ee ci/b2c: allow defining a boot watchdog
This will be helpful for DUTs that do not boot reliably due to firmware
issue as it will allow us to specify a boot retry count that only
counts towards booting linux and not other issues found during test
execution (like hitting a GPU hang).

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Reviewed-by: Eric Engestrom <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32572>
2025-01-21 12:46:31 +00:00
Martin Roukala (né Peres)
82557f9141 ci/b2c: use the runner description rather than ID
Gitlab's runner ID is an integer while CI-Tron's is a string. Let's use
the runner description in the job description since this is what
CI-Tron expects.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Reviewed-by: Eric Engestrom <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32572>
2025-01-21 12:46:31 +00:00
Marek Olšák
de790c3c5f Revert "ac/llvm: enable wqm for ac_build_quad_swizzle from ac_build_fs_interp_mov"
This reverts commit 9d4d9e6150.

It breaks on Navi31:
  * KHR-GL46.shaders.uniform_block.instance_array_basic_type.shared.bvec3,Fail
  * KHR-GL46.shaders.uniform_block.instance_array_basic_type.std140.bvec3,Fail
  * KHR-GL46.shaders.uniform_block.random.all_per_block_buffers.13,Fail
  * KHR-GL46.shaders.uniform_block.random.all_per_block_buffers.3,Fail
  * KHR-GL46.shaders.uniform_block.single_basic_array.shared.bvec3,Fail
  * KHR-GL46.shaders.uniform_block.single_basic_array.std140.bvec3,Fail
  * KHR-GLES3.shaders.uniform_block.instance_array_basic_type.shared.bvec3,Fail
  * KHR-GLES3.shaders.uniform_block.instance_array_basic_type.std140.bvec3,Fail
  * KHR-GLES3.shaders.uniform_block.random.all_per_block_buffers.13,Fail
  * KHR-GLES3.shaders.uniform_block.random.all_per_block_buffers.3,Fail
  * KHR-GLES3.shaders.uniform_block.single_basic_array.shared.bvec3,Fail
  * KHR-GLES3.shaders.uniform_block.single_basic_array.std140.bvec3,Fail
  * dEQP-GLES3.functional.ubo.instance_array_basic_type.shared.bvec3_both,Fail
  * dEQP-GLES3.functional.ubo.instance_array_basic_type.std140.bvec3_both,Fail
  * dEQP-GLES3.functional.ubo.random.vector_types.24,Fail
  * dEQP-GLES3.functional.ubo.single_basic_array.shared.bvec3_both,Fail
  * dEQP-GLES3.functional.ubo.single_basic_array.std140.bvec3_both,Fail

Fixes: 9d4d9e6150
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33118>
2025-01-21 11:58:37 +00:00
Samuel Pitoiset
f4cd2d1c3f radv: use global atomics for generated/written primitives query on GFX12
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33041>
2025-01-21 08:42:32 +00:00
Samuel Pitoiset
0901f8fc25 radv: emit the shader buffer query VA on GFX12
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33041>
2025-01-21 08:42:32 +00:00
Samuel Pitoiset
2f86338ba3 radv: allocate memory for the shader query buffer on GFX12
The allocation is done on-demand.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33041>
2025-01-21 08:42:32 +00:00
Samuel Pitoiset
15a69991fe radv: lower emulated queries with global atomics on GFX12
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33041>
2025-01-21 08:42:32 +00:00
Samuel Pitoiset
a2069b1b26 radv: declare a new user SGPR for emulating queries on GFX12
GDS is gone on GFX12 and generated/written primitives queries need to
be emulated using global atomics. This new user SGPR will be used to
pass the 32-bit VA of the shader query buffer.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33041>
2025-01-21 08:42:32 +00:00
Samuel Pitoiset
b942e285c3 radv: fix transform feedback on GFX12
The original implementation based on RadeonSI was broken for
pause/resume and for indirect draws with a counter buffer basically.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33017>
2025-01-21 08:05:20 +00:00
Samuel Pitoiset
1f253700bc radv: do not overallocate the number of exports for streamout on GFX12
This shouldn't be needed because GE_GS_OREDERD_ID is always reset to 0
when streamout is started. Thus it's technically impossible that the
ordered ID is more than 12-bit.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33017>
2025-01-21 08:05:19 +00:00
Samuel Pitoiset
d4ff011b12 radv: advertise VK_KHR_maintenance8
There is nothing to do for
VK_PIPELINE_CACHE_CREATE_INTERNALLY_SYNCHRONIZED_MERGE_BIT_KHR because
the vulkan/runtime code already locks the dstCache unconditionally.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33091>
2025-01-21 07:28:14 +00:00
Samuel Pitoiset
40131ddadc radv: adjust the source aspect for color to depth/stencil image copies
The opposite is already supported. Note that only one aspect (depth or
stencil) is supported when it's a copy<->depth/stencil copy, and
multiplanar images aren't supported.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33091>
2025-01-21 07:28:14 +00:00
Samuel Pitoiset
3be1e9ee4d radv: add support for VkMemoryBarrierAccessFlags3KHR
There is no flags yet.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33091>
2025-01-21 07:28:14 +00:00
Patrick Lerda
e802793dd5 r600: fix r600_init_screen_caps() has_streamout issue
Indeed, has_streamout is not yet properly initialized at the time
of the call of r600_init_screen_caps(). This change fixes this
issue.

Here is the issue visible on palm at the glxinfo level; the right column is affected:
    Preferred profile: core (0x1)	      |	    Preferred profile: compat (0x2)
    Max core profile version: 4.5	      |	    Max core profile version: 0.0
    Max compat profile version: 4.5	      |	    Max compat profile version: 2.1
    Max GLES1 profile version: 1.1		    Max GLES1 profile version: 1.1
    Max GLES[23] profile version: 3.1	      |	    Max GLES[23] profile version: 2.0

Fixes: 7cd606f01b ("r600: add r600_init_screen_caps")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33106>
2025-01-21 01:46:26 +00:00
Samuel Pitoiset
efab1885b7 ac/sqtt: update programming SQTT on GFX12
This is pure guess but I think GFX12 now uses 48-bits VAs for
configuring the SQTT buffer. This isn't yet enough to generate a
capture because it's missing some info I don't know, but it's a start.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33068>
2025-01-20 23:50:10 +00:00
Samuel Pitoiset
05bfa317a0 radv: remove duplicate definition of SQTT_BUFFER_ALIGN_SHIFT
It's already defined in ac_sqtt.h.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33068>
2025-01-20 23:50:10 +00:00
Karol Herbst
e9d4030fb7 trace: add get_compute_state_info
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33119>
2025-01-20 23:15:31 +00:00
Karol Herbst
f77fea3ba8 trace: copy pipe_caps
Otherwise they are all 0 and frontends might be misbehaving a lot.

Fixes: a036231c09 ("gallium: add u_init_pipe_screen_caps")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33119>
2025-01-20 23:15:31 +00:00
Mike Blumenkrantz
48d0a0322f glsl: plumb num_views down to shader_info::view_mask
this is needed for drivers to more effectively compile multiview-enabled
shaders

Reviewed-by: Timothy Arceri <tarceri@itqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33016>
2025-01-20 22:43:23 +00:00
Danylo Piliaiev
732101d609 tu: Do not disable LRZ for whole RP if it is disabled in RP
It's not rare when only last few draws in a big renderpass disable
LRZ, we shouldn't bail out in such case.

If LRZ is disabled in dir tracking bit during binning - LRZ would
be disabled for the whole IB in the tiling step, so we should avoid
disabling via dir tracking bit and track the state inside the driver.
This doesn't work with secondary command buffers (and renderpass
resume/suspend), in such cases we have to disable LRZ via dir tracking
bit, if LRZ is not valid.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32868>
2025-01-20 22:07:24 +00:00
Danylo Piliaiev
d6684aedf4 tu: Track at which draw call LRZ is disabled
Aside from displaying in a tracepoint, it would be useful in order
to decide whether to disable LRZ for the whole renderpass.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32868>
2025-01-20 22:07:24 +00:00
Danylo Piliaiev
33083d580a freedreno,tu: Unify LRZ layout calculations
Now with nolrzfc the memory for fast-clear will be allocated but
fast-clear itself will not be used.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32868>
2025-01-20 22:07:24 +00:00
Danylo Piliaiev
5a4b28e77c tu: Handle 8x MSAA for LRZ
Fixes: be9f2e5189
("tu/a7xx: support 8x MSAA")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32868>
2025-01-20 22:07:24 +00:00
Danylo Piliaiev
1eee114756 tu: Fix LRZ for arrayed depth
It just didn't work at all.

CC: mesa-stable

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32868>
2025-01-20 22:07:24 +00:00
Danylo Piliaiev
a521253a3f freedreno/regs: Set correct shr for GRAS_LRZ_BUFFER_PITCH.ARRAY_PITCH
CC: mesa-stable

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32868>
2025-01-20 22:07:24 +00:00
Danylo Piliaiev
7dee7956f2 tu: Do not re-calculate static blend LRZ state
If blend LRZ state was already calculated from static info,
re-calculating it with dynamic state would bring stale values
and therefor result in a wrong calculations.

This resulted in LRZ being disabled when it should have not in
native VK titles.

CC: mesa-stable

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32868>
2025-01-20 22:07:24 +00:00
Job Noorman
20cb4eeba6 ir3/ra: allocate shared collects dst over its srcs when possible
Currently, when allocating the dst of shared collects, the registers of
its srcs would only be reused if they are killed. This results in a lot
of needless moves due to suboptimal register allocation.

This commit addresses this generically: allow unavailable registers to
be used for a new dst iff it shares a merge set with, and has the same
offset as, the currently live value.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32021>
2025-01-20 21:35:39 +00:00
Job Noorman
6c776793ba ir3/ra: fix non-trivial collect detection
Detecting non-trivial collects after the fact, i.e., once they are
created by a register assignment of their dst, does not work as this may
cause two different intervals to share a physreg. For example:

_meta:collect sssa_361:150(r50.x) (wrmask=0xf),
              sssa_19:12(r50.x), sssa_103:13(r50.y),
              sssa_355:102(r51.z), sssa_356:103(r51.w)

This is a non-trivial collect with a partial overlap with one of its
child intervals. After moving its dst to a new interval, it will have
the same physreg as the existing interval for sssa_19, causing all sorts
of trouble for RA.

Prevent this by detecting that a future collect may become non-trivial
at the moment one of its sources gets a register assignment that does
not correspond with it merge set's preferred reg and allocating a new
interval for this component.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Fixes: b36a7ce0f1 ("ir3/ra: prevent moving source intervals for shared collects")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32021>
2025-01-20 21:35:39 +00:00
Aleksi Sapon
43ff387aa6 llvmpipe: disable anisotropic filtering for non-2D textures
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Roland Scheidegger <roland.scheidegger@broadcom.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33103>
2025-01-20 21:01:36 +00:00
Samuel Pitoiset
fd8ed50812 zink/ci: add lists for RADV/GFX1200
Copied from NAVI31.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33125>
2025-01-20 20:40:54 +00:00
Samuel Pitoiset
de9d8a23d2 radv: add a helper to report if cooperative matrix is enabled
To avoid duplicating checks.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33120>
2025-01-20 13:58:13 +00:00
Yogesh Mohan Marimuthu
bfa6b9b655 winsys/amdgpu: ensure strict order in updating mqd wptr and doorbell
Need to use mfence to strictly order mqd wptr update and ringing doorbell
in cpu. If the compiler or cpu re-orders it, commands will be missed.

Suggested-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32700>
2025-01-20 09:28:10 +00:00
Yogesh Mohan Marimuthu
57f28ad47f winsys/amdgpu: use next_wptr as cache for userq
The userq packets are added using _pkt_begin(), _pkt_add(), _pkt_end()
functions. As of now _pkt_being() and _pkt_add() is called once. It
is not advisible to update wptr value in mqd multiple times. Hence use
next_wptr as cache in the macros and update mqd mptr before job submission
only once.

Suggested-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32700>
2025-01-20 09:28:10 +00:00
Yogesh Mohan Marimuthu
acbfcb4d36 winsys/amdgpu: ring doorbell before calling userq_signal ioctl
The signal ioctl should only be called after guaranteeing that the hardware
started working on the submissions and that is only after doorbell is ringed.

Otherwise it can in theory happen that the application creates the fence and
is then interrupted before ringing the doorbell. That can result in a GPU
reset because the fence times out.

Suggested-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32700>
2025-01-20 09:28:10 +00:00
Ivan Avdeev
14e3231b56 radv: add a flag to indicate ray tracing support
Determine whether the device has hardware raytracing support early, and
then use this result where needed, instead of checking for `gfx_level`
every time.

This is a prerequisite for CYAN_SKILLFISH chip enablement. This chip is
still GFX10, not GFX10_3, but has hardware support for accelerated
`image_bvh{,64}_intersect_ray` instructions. Just checking for `gfx_level`
is insufficient for it.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33109>
2025-01-20 08:27:11 +00:00
Connor Abbott
cc7be2b2b3 ir3: Use nir_split_struct_vars for temporaries
This should let us lower the RT query stack to registers instead of
scratch by getting rid of the rest of the members of the ray query
struct. This gives a 24% decrease in total time for 3DMark InVitro.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28447>
2025-01-20 01:22:23 +00:00
Connor Abbott
f3f0c5048d tu, ir3: Implement a750 RT workaround
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28447>
2025-01-20 01:22:23 +00:00
Connor Abbott
967ea4bbbb tu: Expose VK_KHR_ray_tracing_maintenance1
All of the features were already implemented in the initial bringup.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28447>
2025-01-20 01:22:23 +00:00
Connor Abbott
36e46b4ada tu: Support VK_KHR_ray_query
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28447>
2025-01-20 01:22:23 +00:00
Connor Abbott
671e3a65a6 tu: Support VK_KHR_acceleration_structure
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28447>
2025-01-20 01:22:23 +00:00
Connor Abbott
78b5999c1e tu: Display when raytracing is disabled in device string
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28447>
2025-01-20 01:22:23 +00:00
Connor Abbott
46cd7faed3 tu: Move fd_dev_info() before name generation
Remove the redundant error that will never be hit in practice (because
if fd_dev_name() succeeds then so will fd_dev_info()) and move it up so
that we can use the info when generating the name.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28447>
2025-01-20 01:22:23 +00:00
Connor Abbott
4a5b234d5e tu: Plumb through raytracing fuse
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28447>
2025-01-20 01:22:23 +00:00
Connor Abbott
9249a189ca tu/kgsl: Bump uapi header
From commit 809ee24fe560.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28447>
2025-01-20 01:22:23 +00:00
Connor Abbott
18550fb41b freedreno: Introduce ray tracing features
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28447>
2025-01-20 01:22:23 +00:00
Connor Abbott
cdb1857a4d tu: Create meta device
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28447>
2025-01-20 01:22:23 +00:00