Commit graph

65652 commits

Author SHA1 Message Date
Matt Turner
9499d6e358 mesa: Unifdef _WIN32_WCE.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2014-09-24 09:58:43 -07:00
Matt Turner
d20015a576 mesa: Unifdef _XBOX.
Inexplicably added in commit 36940429.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2014-09-24 09:58:43 -07:00
Matt Turner
b133b84733 configure.ac: Remove duplicate -DHAVE_PTHREAD.
It's also defined by the AX_PTHREAD macro.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2014-09-24 09:58:43 -07:00
Matt Turner
d1022529fe configure.ac: Stop checking for perl.
Added by commit a75c6163, but no longer used.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2014-09-24 09:58:43 -07:00
Matt Turner
585e250dd2 configure.ac: Use test -a, rather than another test.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2014-09-24 09:58:43 -07:00
Matt Turner
452926a5ec mesa: Use realloc() instead of _mesa_realloc() and remove the latter.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-09-24 09:58:42 -07:00
Matt Turner
e5162defc8 mesa: Remove duplicate _mesa_{init,free}_shader_state prototypes.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2014-09-24 09:58:42 -07:00
Tom Stellard
180b152b24 gallivm: Wrap deleted inlcude in if HAVE_LLVM < 0x0306
This was missed in 8f4ee56.
2014-09-24 11:54:44 -04:00
Matt Turner
ef75f60822 i965: Add and use functions to get next/prev blocks.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2014-09-24 09:42:46 -07:00
Matt Turner
444fc0b4a8 i965: Call insert and remove functions from exec_node directly.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2014-09-24 09:42:46 -07:00
Matt Turner
49374fab5d i965: Make instruction lists local to the bblocks.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2014-09-24 09:42:46 -07:00
Matt Turner
3fe1a84bbe i965/cfg: Add note about double-loop macros and break behavior.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2014-09-24 09:42:46 -07:00
Matt Turner
153d148e9e i965: Replace initialization loops with memset().
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2014-09-24 09:42:46 -07:00
Matt Turner
72bb3f81c6 i965/vec4: Don't iterate between blocks with inst->next/prev.
The register coalescing portion of this patch hurts three shaders in
Guacamelee by one instruction each, but examining the diff makes me
believe that what we were generating was (perhaps harmlessly) incorrect.
2014-09-24 09:42:46 -07:00
Matt Turner
f0598d413b i965/fs: Don't iterate between blocks with inst->next/prev.
When instruction lists are per-basic block, this won't work.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2014-09-24 09:42:46 -07:00
Matt Turner
7119712f45 i965/cfg: Add macros to iterate through a block given a starting point.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2014-09-24 09:42:46 -07:00
Matt Turner
235f451f7a i965/fs: Make count_to_loop_end() use basic blocks.
When the instructions aren't in a flat list, this wouldn't have worked.
Also, this should be faster.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2014-09-24 09:42:46 -07:00
Matt Turner
90bfeb2244 i965/vec4: Don't use instruction list after calculating the cfg.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2014-09-24 09:42:46 -07:00
Matt Turner
2ff0ff880c i965/fs: Don't use instruction list after calculating the cfg.
The only trick is changing a break into a return true in register
coalescing, since the macro is actually a double loop, and break will do
something different than you expect. (Wish I'd realized that earlier!)

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2014-09-24 09:42:46 -07:00
Matt Turner
a4fb8897a2 i965: Remove now unneeded calls to calculate_cfg().
Now that nothing invalidates the CFG, we can calculate_cfg() immediately
after emit_fb_writes()/emit_thread_end() and never again.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2014-09-24 09:42:46 -07:00
Matt Turner
072ea414d0 i965: Remove cfg-invalidating parameter from invalidate_live_intervals.
Everything has been converted to preserve the CFG.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2014-09-24 09:42:46 -07:00
Matt Turner
9e28bb863c i965: Preserve the CFG in instruction scheduling.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2014-09-24 09:42:46 -07:00
Matt Turner
269b6e24d6 i965/vec4: Preserve CFG in spill_reg().
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2014-09-24 09:42:46 -07:00
Matt Turner
b0b64c85e4 i965/vec4: Preserve the CFG in a few more places.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2014-09-24 09:42:46 -07:00
Matt Turner
a9f8296dbb i965/fs: Preserve the CFG in a few more places.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2014-09-24 09:42:46 -07:00
Kristian Høgsberg
9b75663866 i965: Restructure debug flags
This cleans up the debug flags to be consistently indented, use bit
shifting instead of hex-values and fixes a bug where the new DEBUG_NO8 flag
used the same value as the DEBUG_VUE flag.  This was hidden by the numbers not
being aligned.  Also removes gaps in the range where DEBUG_IOCTL (0x4) and
DEBUG_REGION (0x400) used to be.

Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2014-09-24 09:15:09 -07:00
Tom Stellard
8f4ee56e49 gallivm: Disable gallivm to fix build with LLVM 3.6
LLVM commit r218316 removes the JITMemoryManager class, which is
the parent for a seemingly important class in gallivm.  In order to
fix the build, I've wrapped most of lp_bld_misc.cpp in
if HAVE_LLVM < 0x0306 and modifyed the
lp_build_create_jit_compiler_for_module() function to return false
for 3.6 and newer which effectively disables the gallivm functionality.

I realize this is overkill, but I could not come up with a simple
solution to fix the build.  Also, since 3.6 will be the first release
without the old JIT, it would be really great if we could
move gallivm to use the C API only for accessing MCJIT.  There
is still time before the 3.6 release to extend the C API in
case it is missing some functionality that is required by gallivm.
2014-09-24 10:34:19 -04:00
Marek Olšák
2f7714e071 gallium/rbug: correctly unreference a sampler view
This fixes heap corruption. The sampler view can be bound in the context,
so we cannot call destroy directly.

Reviewed-by: Brian Paul <brianp@vmware.com>
2014-09-24 14:48:02 +02:00
Marek Olšák
91ddf49c87 gallium/rbug: unlock a mutex in rbug_create_query
Reviewed-by: Brian Paul <brianp@vmware.com>
2014-09-24 14:48:02 +02:00
Marek Olšák
c944866708 radeonsi: remove old cache flushing code
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-09-24 14:48:02 +02:00
Marek Olšák
dd53d53dc6 radeonsi/compute: do CS partial flush with si_emit_cache_flush
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2014-09-24 14:48:02 +02:00
Marek Olšák
604b58b554 radeonsi/compute: flush caches with si_emit_cache_flush
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2014-09-24 14:48:02 +02:00
Marek Olšák
628f8ee1d9 radeonsi/compute: directly emit CONTEXT_CONTROL
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2014-09-24 14:48:02 +02:00
Marek Olšák
dc05a9e4e0 radeonsi: properly destroy the GS copy shader and scratch_bo for compute
Cc: 10.2 10.3 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-09-24 14:48:02 +02:00
Marek Olšák
711623f7c8 radeonsi: release GS rings at context destruction
Cc: 10.2 10.3 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-09-24 14:48:02 +02:00
Marek Olšák
2833dc4e45 radeonsi: don't use pipe_constant_buffer for GS rings
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-09-24 14:48:02 +02:00
Marek Olšák
1abb1a97b0 radeonsi: don't pass the context to the shader translator
This should prevent accessing context state there.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-09-24 14:48:02 +02:00
Marek Olšák
e29353ff20 radeonsi: don't snoop currently-bound GS shader when compiling ES
Instead, pass the layout of GS inputs in memory to the ES using the shader
key. Only 64 bits are needed to represent the layout in the key.

Mixing and matching different VS and GS shaders should now always work.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-09-24 14:48:02 +02:00
Marek Olšák
2774abd4ce radeonsi: shorten si_pipe_* prefixes to si_*
This was the original naming convention in r600g and it somehow crept
into radeonsi.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-09-24 14:48:02 +02:00
Marek Olšák
8c37c16cbc radeonsi: merge si_pipe_shader into si_shader
One is part of the other anyway.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-09-24 14:48:02 +02:00
Marek Olšák
07c0b4d9b7 radeonsi: disable gl_SampleMask fragment shader output if MSAA is disabled
This fixes piglit: arb_sample_shading-builtin-gl-sample-mask 0

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-09-24 14:48:02 +02:00
Marek Olšák
b53b1ceb3e radeonsi: only update MSAA-specific framebuffer state if nr_samples is changed
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-09-24 14:48:02 +02:00
Marek Olšák
dba4c5baf4 radeonsi: move DB_SHADER_CONTROL into db_render_state
I will need this for fixing sample shading with 1 sample.

The good news is that all shader pm4 states no longer use the current context
state, so we can generate the pm4 states outside of draw_vbo if needed.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-09-24 14:48:02 +02:00
Marek Olšák
adc5797f54 radeonsi: set KILL_ENABLE during shader compilation, remove uses_kill flag
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-09-24 14:48:02 +02:00
Marek Olšák
a34c9f70b1 radeonsi: remove shader.ps_conservative_z, set db_shader_control instead
Also set the field on SI too. It's not just specific to CIK.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-09-24 14:48:02 +02:00
Marek Olšák
884f1654e2 radeonsi: move DB registers from draw_vbo into new db_render_state
It's called db_misc_state in r600g.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-09-24 14:48:02 +02:00
Marek Olšák
a768b43bc3 radeonsi: remove unused variable si_pipe_shader::sprite_coord_enable
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-09-24 14:48:02 +02:00
Marek Olšák
fd076259ff radeonsi: document what si_descriptors.c does
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-09-24 14:48:02 +02:00
Marek Olšák
4ace4190ac r300g: implement MSAA copies by resolving and upsampling
There's no other way. It will use hw resolve + blit.
2014-09-24 14:48:02 +02:00
Marek Olšák
6cfedf8797 st/mesa: redefine mapping from VARYING_SLOT_TEXi/PNTC/VARi to TGSI GENERIC[i]
Generic varyings in TGSI were based on the value of VARYING_SLOT_TEX0, so VAR0
was always GENERIC[22] (with tessellation patches). Some drivers might not
be able to cope with that.

This commit defines a proper mapping, so that PNTC is GENERIC[8] and VAR0 is
GENERIC[9].

Reviewed-by: Brian Paul <brianp@vmware.com>
2014-09-24 14:48:02 +02:00