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iris: Rework iris_sample_with_depth_aux() into helper that returns aux usage.

Browse source 
Since this does most of the work to determine the right aux usage for
a depth texture, turn it into a helper that returns that aux usage in
order to avoid duplication of logic between it and its callers.

Suggested-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31139>
This commit is contained in:
Francisco Jerez 2025-10-07 15:07:58 -07:00 • committed by Marge Bot
parent c0cf14f0e2
commit ffb4d3a032
4 changed files with 27 additions and 35 deletions
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41
src/gallium/drivers/iris/iris_resolve.c
View file

@ -614,9 +614,9 @@ iris_mcs_exec(struct iris_context *ice,
iris_batch_sync_region_end(batch);
}
bool
iris_sample_with_depth_aux(const struct intel_device_info *devinfo,
const struct iris_resource *res)
enum isl_aux_usage
iris_depth_texture_aux_usage(const struct intel_device_info *devinfo,
const struct iris_resource *res)
{
switch (res->aux.usage) {
case ISL_AUX_USAGE_HIZ_CCS_WT:
@ -624,12 +624,19 @@ iris_sample_with_depth_aux(const struct intel_device_info *devinfo,
* doesn't comprehend HiZ, write-through means that the correct data
* will be in the CCS, and the sampler can simply rely on that.
*/
return true;
return res->aux.usage;
case ISL_AUX_USAGE_HIZ_CCS:
/* Without write-through, the CCS data may be out of sync with HiZ
* and the sampler won't see the correct data. Skip both.
/* Without write-through, the CCS data may be out of sync with
* HiZ and the sampler won't see the correct data, however
* starting on gfx12.5 it is possible to perform a partial
* resolve which makes the CCS surface consistent with the
* contents of the HiZ surface, allowing us to keep CCS enabled
* while sampling from it. This avoids the overhead of a full
* resolve, is beneficial for bandwidth consumption and avoids
* triggering the hardware bugs of full resolves on DG2/MTL.
*/
return false;
return (devinfo->verx10 >= 125 ? ISL_AUX_USAGE_HIZ_CCS_WT :
ISL_AUX_USAGE_NONE);
case ISL_AUX_USAGE_HIZ:
/* From the Broadwell PRM (Volume 2d: Command Reference: Structures
* RENDER_SURFACE_STATE.AuxiliarySurfaceMode):
@ -643,12 +650,12 @@ iris_sample_with_depth_aux(const struct intel_device_info *devinfo,
if (!devinfo->has_sample_with_hiz ||
res->surf.samples != 1 ||
res->surf.dim != ISL_SURF_DIM_2D)
return false;
return ISL_AUX_USAGE_NONE;
/* We can sample directly from HiZ in this case. */
return true;
return res->aux.usage;
default:
return false;
return ISL_AUX_USAGE_NONE;
}
}
@ -989,19 +996,7 @@ iris_resource_texture_aux_usage(struct iris_context *ice,
case ISL_AUX_USAGE_HIZ_CCS:
case ISL_AUX_USAGE_HIZ_CCS_WT:
assert(res->surf.format == view_format);
/* Even if iris_sample_with_depth_aux() tells us we can't keep
* HiZ enabled for sampling it is possible to perform a partial
* resolve (supported on Gfx12.5+) which makes the CCS surface
* consistent with the contents of the HiZ surface, allowing us
* to keep CCS enabled while sampling from it. This avoids the
* overhead of a full resolve, is beneficial for bandwidth
* consumption and avoids triggering the hardware bugs of full
* resolves on DG2/MTL.
*/
return (iris_sample_with_depth_aux(devinfo, res) ? res->aux.usage :
devinfo->verx10 >= 125 && res->aux.usage == ISL_AUX_USAGE_HIZ_CCS ?
ISL_AUX_USAGE_HIZ_CCS_WT :
ISL_AUX_USAGE_NONE);
return iris_depth_texture_aux_usage(devinfo, res);
case ISL_AUX_USAGE_MCS:
case ISL_AUX_USAGE_MCS_CCS:

4
src/gallium/drivers/iris/iris_resource.c
View file

@ -667,9 +667,7 @@ iris_get_aux_clear_color_state_size(struct iris_screen *screen,
* Gfx12.5 partial resolve.
*/
if (isl_surf_usage_is_depth(res->surf.usage) &&
!(iris_sample_with_depth_aux(screen->devinfo, res) ||
(screen->devinfo->verx10 == 125 &&
isl_aux_usage_has_ccs(res->aux.usage))))
!iris_depth_texture_aux_usage(screen->devinfo, res))
return 0;
return screen->isl_dev.ss.clear_color_state_size;

5
src/gallium/drivers/iris/iris_resource.h
View file

@ -493,8 +493,9 @@ bool iris_has_invalid_primary(const struct iris_resource *res,
void iris_resource_check_level_layer(const struct iris_resource *res,
uint32_t level, uint32_t layer);
bool iris_sample_with_depth_aux(const struct intel_device_info *devinfo,
const struct iris_resource *res);
enum isl_aux_usage
iris_depth_texture_aux_usage(const struct intel_device_info *devinfo,
const struct iris_resource *res);
bool iris_has_color_unresolved(const struct iris_resource *res,
unsigned start_level, unsigned num_levels,

12
src/gallium/drivers/iris/iris_state.c
View file

@ -3114,19 +3114,17 @@ iris_create_sampler_view(struct pipe_context *ctx,
isv->res->aux.usage == ISL_AUX_USAGE_FCV_CCS_E) &&
!isl_format_supports_ccs_e(devinfo, isv->view.format)) {
aux_usages = 1 << ISL_AUX_USAGE_NONE;
} else if (isl_aux_usage_has_hiz(isv->res->aux.usage) &&
!iris_sample_with_depth_aux(devinfo, isv->res)) {
if (isv->res->aux.usage == ISL_AUX_USAGE_HIZ_CCS &&
devinfo->verx10 >= 125) {
} else if (isl_aux_usage_has_hiz(isv->res->aux.usage)) {
aux_usages = 1 << iris_depth_texture_aux_usage(devinfo, isv->res);
if (isv->res->aux.usage != ISL_AUX_USAGE_HIZ_CCS ||
devinfo->verx10 < 125) {
/* On Gfx12.5+ we can use partial resolves to maintain a
* depth surface CCS-compressed while sampling. We don't
* allow NONE though since the full resolves required to
* bring the surface to that state appear to be buggy on at
* least DG2 and MTL.
*/
aux_usages = 1 << ISL_AUX_USAGE_HIZ_CCS_WT;
} else {
aux_usages = 1 << ISL_AUX_USAGE_NONE;
aux_usages |= 1 << ISL_AUX_USAGE_NONE;
}
} else {
aux_usages = 1 << ISL_AUX_USAGE_NONE |