diff --git a/src/gallium/drivers/radeonsi/si_clear.c b/src/gallium/drivers/radeonsi/si_clear.c
index 73597340ff5..817cc7f55a7 100644
--- a/src/gallium/drivers/radeonsi/si_clear.c
+++ b/src/gallium/drivers/radeonsi/si_clear.c
@@ -799,7 +799,7 @@ static void si_fast_clear(struct si_context *sctx, unsigned *buffers,
                   /* Z-only clear. */
                   clear_value = si_get_htile_clear_value(zstex, depth);
                   *buffers &= ~PIPE_CLEAR_DEPTH;
-                  zstex->depth_cleared_level_mask |= BITFIELD_BIT(level);
+                  zstex->depth_cleared_level_mask_once |= BITFIELD_BIT(level);
                   update_db_depth_clear = true;
                }
             } else if ((*buffers & PIPE_BIND_DEPTH_STENCIL) == PIPE_BIND_DEPTH_STENCIL) {
@@ -808,7 +808,7 @@ static void si_fast_clear(struct si_context *sctx, unsigned *buffers,
                   /* Combined Z+S clear. */
                   clear_value = si_get_htile_clear_value(zstex, depth);
                   *buffers &= ~PIPE_CLEAR_DEPTHSTENCIL;
-                  zstex->depth_cleared_level_mask |= BITFIELD_BIT(level);
+                  zstex->depth_cleared_level_mask_once |= BITFIELD_BIT(level);
                   zstex->stencil_cleared_level_mask |= BITFIELD_BIT(level);
                   update_db_depth_clear = true;
                   update_db_stencil_clear = true;
@@ -872,7 +872,7 @@ static void si_fast_clear(struct si_context *sctx, unsigned *buffers,
                                     htile_size, si_get_htile_clear_value(zstex, depth));
                clear_types |= SI_CLEAR_TYPE_HTILE;
                *buffers &= ~PIPE_CLEAR_DEPTH;
-               zstex->depth_cleared_level_mask |= BITFIELD_BIT(level);
+               zstex->depth_cleared_level_mask_once |= BITFIELD_BIT(level);
                update_db_depth_clear = true;
             }
          } else if ((*buffers & PIPE_BIND_DEPTH_STENCIL) == PIPE_BIND_DEPTH_STENCIL) {
@@ -885,7 +885,7 @@ static void si_fast_clear(struct si_context *sctx, unsigned *buffers,
                                     htile_size, si_get_htile_clear_value(zstex, depth));
                clear_types |= SI_CLEAR_TYPE_HTILE;
                *buffers &= ~PIPE_CLEAR_DEPTHSTENCIL;
-               zstex->depth_cleared_level_mask |= BITFIELD_BIT(level);
+               zstex->depth_cleared_level_mask_once |= BITFIELD_BIT(level);
                zstex->stencil_cleared_level_mask |= BITFIELD_BIT(level);
                update_db_depth_clear = true;
                update_db_stencil_clear = true;
@@ -910,7 +910,7 @@ static void si_fast_clear(struct si_context *sctx, unsigned *buffers,
                                         htile_depth_writemask);
                clear_types |= SI_CLEAR_TYPE_HTILE;
                *buffers &= ~PIPE_CLEAR_DEPTH;
-               zstex->depth_cleared_level_mask |= BITFIELD_BIT(level);
+               zstex->depth_cleared_level_mask_once |= BITFIELD_BIT(level);
                update_db_depth_clear = true;
             } else if (htile_size &&
                        !(*buffers & PIPE_CLEAR_DEPTH) &&
@@ -968,6 +968,9 @@ static void si_clear(struct pipe_context *ctx, unsigned buffers,
    else if (!util_format_has_stencil(util_format_description(zsbuf->format)))
       buffers &= ~PIPE_CLEAR_STENCIL;
 
+   if (buffers & PIPE_CLEAR_DEPTH)
+      zstex->depth_cleared_level_mask |= BITFIELD_BIT(zsbuf->u.tex.level);
+
    si_fast_clear(sctx, &buffers, color, depth, stencil);
    if (!buffers)
       return; /* all buffers have been cleared */
@@ -990,7 +993,7 @@ static void si_clear(struct pipe_context *ctx, unsigned buffers,
       if (si_can_fast_clear_depth(zstex, level, depth, buffers)) {
          /* Need to disable EXPCLEAR temporarily if clearing
           * to a new value. */
-         if (!(zstex->depth_cleared_level_mask & BITFIELD_BIT(level)) ||
+         if (!(zstex->depth_cleared_level_mask_once & BITFIELD_BIT(level)) ||
              zstex->depth_clear_value[level] != depth) {
             sctx->db_depth_disable_expclear = true;
          }
@@ -1049,7 +1052,7 @@ static void si_clear(struct pipe_context *ctx, unsigned buffers,
    if (sctx->db_depth_clear) {
       sctx->db_depth_clear = false;
       sctx->db_depth_disable_expclear = false;
-      zstex->depth_cleared_level_mask |= BITFIELD_BIT(zsbuf->u.tex.level);
+      zstex->depth_cleared_level_mask_once |= BITFIELD_BIT(zsbuf->u.tex.level);
       si_mark_atom_dirty(sctx, &sctx->atoms.s.db_render_state);
    }
 
diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index 728b92e2a71..e741a760ce5 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -366,7 +366,8 @@ struct si_texture {
    /* Depth buffer compression and fast clear. */
    float depth_clear_value[RADEON_SURF_MAX_LEVELS];
    uint8_t stencil_clear_value[RADEON_SURF_MAX_LEVELS];
-   uint16_t depth_cleared_level_mask;   /* if it was cleared at least once */
+   uint16_t depth_cleared_level_mask_once; /* if it was cleared at least once */
+   uint16_t depth_cleared_level_mask;     /* track if it was cleared (not 100% accurate) */
    uint16_t stencil_cleared_level_mask; /* if it was cleared at least once */
    uint16_t dirty_level_mask;         /* each bit says if that mipmap is compressed */
    uint16_t stencil_dirty_level_mask; /* each bit says if that mipmap is compressed */
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.cpp b/src/gallium/drivers/radeonsi/si_state_draw.cpp
index ad003902127..f70496708cf 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.cpp
+++ b/src/gallium/drivers/radeonsi/si_state_draw.cpp
@@ -2280,6 +2280,11 @@ static void si_draw_vbo(struct pipe_context *ctx,
          sctx->num_prim_restart_calls++;
    }
 
+   if (!sctx->blitter_running && sctx->framebuffer.state.zsbuf) {
+      struct si_texture *zstex = (struct si_texture *)sctx->framebuffer.state.zsbuf->texture;
+      zstex->depth_cleared_level_mask &= ~BITFIELD_BIT(sctx->framebuffer.state.zsbuf->u.tex.level);
+   }
+
    /* TODO: Set displayable_dcc_dirty if image stores are used. */
 
    DRAW_CLEANUP;
diff --git a/src/gallium/drivers/radeonsi/si_texture.c b/src/gallium/drivers/radeonsi/si_texture.c
index 7d916cfcde9..cf41f4842eb 100644
--- a/src/gallium/drivers/radeonsi/si_texture.c
+++ b/src/gallium/drivers/radeonsi/si_texture.c
@@ -482,7 +482,7 @@ static void si_reallocate_texture_inplace(struct si_context *sctx, struct si_tex
    tex->db_render_format = new_tex->db_render_format;
    memcpy(tex->stencil_clear_value, new_tex->stencil_clear_value, sizeof(tex->stencil_clear_value));
    tex->tc_compatible_htile = new_tex->tc_compatible_htile;
-   tex->depth_cleared_level_mask = new_tex->depth_cleared_level_mask;
+   tex->depth_cleared_level_mask_once = new_tex->depth_cleared_level_mask_once;
    tex->stencil_cleared_level_mask = new_tex->stencil_cleared_level_mask;
    tex->upgraded_depth = new_tex->upgraded_depth;
    tex->db_compatible = new_tex->db_compatible;