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nir/spirv: Add support for a bunch of ALU operations
This commit is contained in:
Jason Ekstrand
parent
d2a7972557
commit
ff828749ea
1 changed files with 195 additions and 7 deletions
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@ -27,6 +27,7 @@
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#include "nir_spirv.h"
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#include "nir_vla.h"
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#include "nir_builder.h"
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#include "spirv.h"
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struct vtn_decoration;
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@ -81,6 +82,8 @@ struct vtn_decoration {
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};
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struct vtn_builder {
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nir_builder nb;
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nir_shader *shader;
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nir_function_impl *impl;
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struct exec_list *cf_list;
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@ -705,11 +708,192 @@ vtn_handle_texture(struct vtn_builder *b, SpvOp opcode,
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unreachable("Unhandled opcode");
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}
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static void
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vtn_handle_matrix_alu(struct vtn_builder *b, SpvOp opcode,
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const uint32_t *w, unsigned count)
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{
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unreachable("Matrix math not handled");
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}
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static void
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vtn_handle_alu(struct vtn_builder *b, SpvOp opcode,
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const uint32_t *w, unsigned count)
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{
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unreachable("Unhandled opcode");
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struct vtn_value *val = vtn_push_value(b, w[2], vtn_value_type_ssa);
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val->type = vtn_value(b, w[1], vtn_value_type_type)->type;
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/* Collect the various SSA sources */
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unsigned num_inputs = count - 3;
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nir_ssa_def *src[4];
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for (unsigned i = 0; i < num_inputs; i++)
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src[i] = vtn_ssa_value(b, w[i + 3]);
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/* We use the builder for some of the instructions. Go ahead and
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* initialize it with the current cf_list.
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*/
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nir_builder_insert_after_cf_list(&b->nb, b->cf_list);
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/* Indicates that the first two arguments should be swapped. This is
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* used for implementing greater-than and less-than-or-equal.
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*/
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bool swap = false;
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nir_op op;
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switch (opcode) {
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/* Basic ALU operations */
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case SpvOpSNegate: op = nir_op_ineg; break;
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case SpvOpFNegate: op = nir_op_fneg; break;
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case SpvOpNot: op = nir_op_inot; break;
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case SpvOpAny:
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switch (src[0]->num_components) {
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case 1: op = nir_op_imov; break;
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case 2: op = nir_op_bany2; break;
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case 3: op = nir_op_bany3; break;
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case 4: op = nir_op_bany4; break;
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}
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break;
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case SpvOpAll:
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switch (src[0]->num_components) {
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case 1: op = nir_op_imov; break;
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case 2: op = nir_op_ball2; break;
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case 3: op = nir_op_ball3; break;
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case 4: op = nir_op_ball4; break;
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}
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break;
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case SpvOpIAdd: op = nir_op_iadd; break;
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case SpvOpFAdd: op = nir_op_fadd; break;
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case SpvOpISub: op = nir_op_isub; break;
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case SpvOpFSub: op = nir_op_fsub; break;
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case SpvOpIMul: op = nir_op_imul; break;
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case SpvOpFMul: op = nir_op_fmul; break;
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case SpvOpUDiv: op = nir_op_udiv; break;
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case SpvOpSDiv: op = nir_op_idiv; break;
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case SpvOpFDiv: op = nir_op_fdiv; break;
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case SpvOpUMod: op = nir_op_umod; break;
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case SpvOpSMod: op = nir_op_umod; break; /* FIXME? */
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case SpvOpFMod: op = nir_op_fmod; break;
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case SpvOpDot:
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assert(src[0]->num_components == src[1]->num_components);
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switch (src[0]->num_components) {
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case 1: op = nir_op_fmul; break;
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case 2: op = nir_op_fdot2; break;
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case 3: op = nir_op_fdot3; break;
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case 4: op = nir_op_fdot4; break;
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}
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break;
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case SpvOpShiftRightLogical: op = nir_op_ushr; break;
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case SpvOpShiftRightArithmetic: op = nir_op_ishr; break;
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case SpvOpShiftLeftLogical: op = nir_op_ishl; break;
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case SpvOpLogicalOr: op = nir_op_ior; break;
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case SpvOpLogicalXor: op = nir_op_ixor; break;
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case SpvOpLogicalAnd: op = nir_op_iand; break;
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case SpvOpBitwiseOr: op = nir_op_ior; break;
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case SpvOpBitwiseXor: op = nir_op_ixor; break;
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case SpvOpBitwiseAnd: op = nir_op_iand; break;
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case SpvOpSelect: op = nir_op_bcsel; break;
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case SpvOpIEqual: op = nir_op_ieq; break;
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/* Comparisons: (TODO: How do we want to handled ordered/unordered?) */
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case SpvOpFOrdEqual: op = nir_op_feq; break;
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case SpvOpFUnordEqual: op = nir_op_feq; break;
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case SpvOpINotEqual: op = nir_op_ine; break;
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case SpvOpFOrdNotEqual: op = nir_op_fne; break;
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case SpvOpFUnordNotEqual: op = nir_op_fne; break;
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case SpvOpULessThan: op = nir_op_ult; break;
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case SpvOpSLessThan: op = nir_op_ilt; break;
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case SpvOpFOrdLessThan: op = nir_op_flt; break;
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case SpvOpFUnordLessThan: op = nir_op_flt; break;
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case SpvOpUGreaterThan: op = nir_op_ult; swap = true; break;
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case SpvOpSGreaterThan: op = nir_op_ilt; swap = true; break;
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case SpvOpFOrdGreaterThan: op = nir_op_flt; swap = true; break;
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case SpvOpFUnordGreaterThan: op = nir_op_flt; swap = true; break;
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case SpvOpULessThanEqual: op = nir_op_uge; swap = true; break;
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case SpvOpSLessThanEqual: op = nir_op_ige; swap = true; break;
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case SpvOpFOrdLessThanEqual: op = nir_op_fge; swap = true; break;
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case SpvOpFUnordLessThanEqual: op = nir_op_fge; swap = true; break;
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case SpvOpUGreaterThanEqual: op = nir_op_uge; break;
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case SpvOpSGreaterThanEqual: op = nir_op_ige; break;
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case SpvOpFOrdGreaterThanEqual: op = nir_op_fge; break;
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case SpvOpFUnordGreaterThanEqual:op = nir_op_fge; break;
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/* Conversions: */
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case SpvOpConvertFToU: op = nir_op_f2u; break;
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case SpvOpConvertFToS: op = nir_op_f2i; break;
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case SpvOpConvertSToF: op = nir_op_i2f; break;
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case SpvOpConvertUToF: op = nir_op_u2f; break;
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case SpvOpBitcast: op = nir_op_imov; break;
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case SpvOpUConvert:
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case SpvOpSConvert:
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op = nir_op_imov; /* TODO: NIR is 32-bit only; these are no-ops. */
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break;
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case SpvOpFConvert:
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op = nir_op_fmov;
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break;
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/* Derivatives: */
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case SpvOpDPdx: op = nir_op_fddx; break;
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case SpvOpDPdy: op = nir_op_fddy; break;
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case SpvOpDPdxFine: op = nir_op_fddx_fine; break;
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case SpvOpDPdyFine: op = nir_op_fddy_fine; break;
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case SpvOpDPdxCoarse: op = nir_op_fddx_coarse; break;
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case SpvOpDPdyCoarse: op = nir_op_fddy_coarse; break;
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case SpvOpFwidth:
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val->ssa = nir_fadd(&b->nb,
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nir_fabs(&b->nb, nir_fddx(&b->nb, src[0])),
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nir_fabs(&b->nb, nir_fddx(&b->nb, src[1])));
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return;
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case SpvOpFwidthFine:
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val->ssa = nir_fadd(&b->nb,
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nir_fabs(&b->nb, nir_fddx_fine(&b->nb, src[0])),
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nir_fabs(&b->nb, nir_fddx_fine(&b->nb, src[1])));
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return;
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case SpvOpFwidthCoarse:
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val->ssa = nir_fadd(&b->nb,
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nir_fabs(&b->nb, nir_fddx_coarse(&b->nb, src[0])),
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nir_fabs(&b->nb, nir_fddx_coarse(&b->nb, src[1])));
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return;
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case SpvOpVectorTimesScalar:
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/* The builder will take care of splatting for us. */
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val->ssa = nir_fmul(&b->nb, src[0], src[1]);
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return;
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case SpvOpSRem:
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case SpvOpFRem:
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unreachable("No NIR equivalent");
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case SpvOpIsNan:
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case SpvOpIsInf:
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case SpvOpIsFinite:
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case SpvOpIsNormal:
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case SpvOpSignBitSet:
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case SpvOpLessOrGreater:
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case SpvOpOrdered:
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case SpvOpUnordered:
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default:
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unreachable("Unhandled opcode");
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}
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if (swap) {
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nir_ssa_def *tmp = src[0];
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src[0] = src[1];
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src[1] = tmp;
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}
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nir_alu_instr *instr = nir_alu_instr_create(b->shader, op);
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nir_ssa_dest_init(&instr->instr, &instr->dest.dest,
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glsl_get_vector_elements(val->type), val->name);
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val->ssa = &instr->dest.dest.ssa;
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for (unsigned i = 0; i < nir_op_infos[op].num_inputs; i++)
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instr->src[i].src = nir_src_for_ssa(src[i]);
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nir_instr_insert_after_cf_list(b->cf_list, &instr->instr);
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}
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static bool
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@ -993,7 +1177,6 @@ vtn_handle_body_instruction(struct vtn_builder *b, SpvOp opcode,
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case SpvOpPtrCastToGeneric:
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case SpvOpGenericCastToPtr:
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case SpvOpBitcast:
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case SpvOpTranspose:
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case SpvOpIsNan:
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case SpvOpIsInf:
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case SpvOpIsFinite:
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@ -1017,11 +1200,6 @@ vtn_handle_body_instruction(struct vtn_builder *b, SpvOp opcode,
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case SpvOpFRem:
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case SpvOpFMod:
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case SpvOpVectorTimesScalar:
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case SpvOpMatrixTimesScalar:
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case SpvOpVectorTimesMatrix:
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case SpvOpMatrixTimesVector:
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case SpvOpMatrixTimesMatrix:
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case SpvOpOuterProduct:
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case SpvOpDot:
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case SpvOpShiftRightLogical:
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case SpvOpShiftRightArithmetic:
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@ -1067,6 +1245,15 @@ vtn_handle_body_instruction(struct vtn_builder *b, SpvOp opcode,
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vtn_handle_alu(b, opcode, w, count);
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break;
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case SpvOpTranspose:
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case SpvOpOuterProduct:
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case SpvOpMatrixTimesScalar:
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case SpvOpVectorTimesMatrix:
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case SpvOpMatrixTimesVector:
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case SpvOpMatrixTimesMatrix:
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vtn_handle_matrix_alu(b, opcode, w, count);
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break;
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default:
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unreachable("Unhandled opcode");
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}
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@ -1163,6 +1350,7 @@ spirv_to_nir(const uint32_t *words, size_t word_count,
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foreach_list_typed(struct vtn_function, func, node, &b->functions) {
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b->impl = nir_function_impl_create(func->overload);
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nir_builder_init(&b->nb, b->impl);
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b->cf_list = &b->impl->body;
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vtn_walk_blocks(b, func->start_block, NULL);
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}
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