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intel/fs/xe2+: Handle extended math instructions as in-order in SWSB pass.
Extended math instructions are now synchronized as in-order instructions like other ALU operations, which is more efficient than the out-of-order tracking we had to do in previous generations, and avoids false dependencies introduced due to SBID aliasing. Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25514>
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5fb6760f11
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2 changed files with 6 additions and 4 deletions
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@ -127,6 +127,8 @@ namespace {
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return TGL_PIPE_NONE;
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else if (devinfo->verx10 < 125)
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return TGL_PIPE_FLOAT;
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else if (inst->is_math() && devinfo->ver >= 20)
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return TGL_PIPE_MATH;
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else if (inst->opcode == SHADER_OPCODE_MOV_INDIRECT ||
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inst->opcode == SHADER_OPCODE_BROADCAST ||
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inst->opcode == SHADER_OPCODE_SHUFFLE ||
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@ -1016,8 +1018,8 @@ namespace {
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const ordered_address jp = p ? ordered_address(p, jps[ip].jp[IDX(p)]) :
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ordered_address();
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const bool is_ordered = ordered_unit(devinfo, inst, IDX(TGL_PIPE_ALL));
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const bool uses_math_pipe =
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inst->is_math() ||
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const bool is_unordered_math =
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(inst->is_math() && devinfo->ver < 20) ||
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(devinfo->has_64bit_float_via_math_pipe &&
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(get_exec_type(inst) == BRW_REGISTER_TYPE_DF ||
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inst->dst.type == BRW_REGISTER_TYPE_DF));
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@ -1029,7 +1031,7 @@ namespace {
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for (unsigned i = 0; i < inst->sources; i++) {
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const dependency rd_dep =
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(inst->is_payload(i) ||
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uses_math_pipe) ? dependency(TGL_SBID_SRC, ip, exec_all) :
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is_unordered_math) ? dependency(TGL_SBID_SRC, ip, exec_all) :
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is_ordered ? dependency(TGL_REGDIST_SRC, jp, exec_all) :
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dependency::done;
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@ -575,7 +575,7 @@ is_send(const fs_inst *inst)
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static inline bool
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is_unordered(const intel_device_info *devinfo, const fs_inst *inst)
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{
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return is_send(inst) || inst->is_math() ||
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return is_send(inst) || (devinfo->ver < 20 && inst->is_math()) ||
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(devinfo->has_64bit_float_via_math_pipe &&
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(get_exec_type(inst) == BRW_REGISTER_TYPE_DF ||
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inst->dst.type == BRW_REGISTER_TYPE_DF));
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