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radv/amdgpu: fix chaining CS with external IBs on compute queue

Browse source 
In a scenario where two non-concurrent cmdbufs are submitted to the
compute queue and with the second one using DGCC, the driver would have
chained the CS of the first cmdbuf to the new IB created right after
the DGC IB is executed.

Found while working on DGC task shader with vkd3d-proton.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29913>
This commit is contained in:
Samuel Pitoiset 2024-06-26 13:57:06 +02:00 • committed by Marge Bot
parent bd93e33087
commit fec9b56f17
1 changed files with 17 additions and 11 deletions
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28
src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
View file

@ -524,6 +524,17 @@ radv_amdgpu_cs_reset(struct radeon_cmdbuf *_cs)
cs->annotations = NULL;
}
static bool
radv_amdgpu_cs_has_external_ib(const struct radv_amdgpu_cs *cs)
{
for (unsigned i = 0; i < cs->num_ib_buffers; i++) {
if (!cs->ib_buffers[i].bo)
return true;
}
return false;
}
static void
radv_amdgpu_cs_unchain(struct radeon_cmdbuf *cs)
{
@ -560,6 +571,12 @@ radv_amdgpu_cs_chain(struct radeon_cmdbuf *cs, struct radeon_cmdbuf *next_cs, bo
if (!acs->use_ib)
return false;
/* Do not chain if the next CS has external IBs because it will chain to newly created IB instead
* of the first one.
*/
if (radv_amdgpu_cs_has_external_ib(next_acs))
return false;
assert(cs->cdw <= cs->max_dw + 4);
acs->chained_to = next_acs;
@ -949,17 +966,6 @@ radv_assign_last_submit(struct radv_amdgpu_ctx *ctx, struct radv_amdgpu_cs_reque
radv_amdgpu_request_to_fence(ctx, &ctx->last_submission[request->ip_type][request->ring], request);
}
static bool
radv_amdgpu_cs_has_external_ib(const struct radv_amdgpu_cs *cs)
{
for (unsigned i = 0; i < cs->num_ib_buffers; i++) {
if (!cs->ib_buffers[i].bo)
return true;
}
return false;
}
static unsigned
radv_amdgpu_get_num_ibs_per_cs(const struct radv_amdgpu_cs *cs)
{