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amd: add and use ac_cu_info::has_gfx6_mrt_export_bug

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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38701>
This commit is contained in:
Daniel Schürmann 2025-11-27 14:41:22 +01:00 • committed by Marge Bot
parent 7b7bdb76ab
commit febc29907c
6 changed files with 9 additions and 4 deletions
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3
src/amd/common/ac_gpu_info.c
View file

@ -319,6 +319,9 @@ ac_fill_cu_info(struct radeon_info *info, struct drm_amdgpu_info_device *device_
(info->family >= CHIP_MI100 && info->family != CHIP_NAVI10 && info->family != CHIP_GFX1013);
/* GFX1013 is GFX10 plus ray tracing instructions */
cu_info->has_image_bvh_intersect_ray = info->gfx_level >= GFX10_3 || info->family == CHIP_GFX1013;
cu_info->has_gfx6_mrt_export_bug =
info->family == CHIP_TAHITI || info->family == CHIP_PITCAIRN || info->family == CHIP_VERDE;
}
enum ac_query_gpu_info_result

2
src/amd/common/ac_gpu_info.h
View file

@ -66,6 +66,8 @@ struct ac_cu_info {
* image_bvh*_intersect_ray instructions
*/
bool has_image_bvh_intersect_ray : 1;
/* Some GFX6 GPUs have a bug where it only looks at the x writemask component. */
bool has_gfx6_mrt_export_bug : 1;
};
struct radeon_info {

3
src/amd/compiler/aco_assembler.cpp
View file

@ -1003,8 +1003,7 @@ emit_exp_instruction(asm_context& ctx, std::vector<uint32_t>& out, const Instruc
/* GFX6 (except OLAND and HAINAN) has a bug that it only looks at the X
* writemask component.
*/
if (ctx.gfx_level == GFX6 && ctx.program->family != CHIP_OLAND &&
ctx.program->family != CHIP_HAINAN && exp.enabled_mask && exp.dest <= V_008DFC_SQ_EXP_MRTZ) {
if (ctx.program->dev.has_gfx6_mrt_export_bug && exp.enabled_mask && exp.dest <= V_008DFC_SQ_EXP_MRTZ) {
encoding |= 0x1;
}

1
src/amd/compiler/aco_ir.cpp
View file

@ -108,6 +108,7 @@ init_program(Program* program, Stage stage, const struct aco_shader_info* info,
program->dev.sram_ecc_enabled = options->cu_info->has_sram_ecc_enabled;
program->dev.has_point_sample_accel = options->cu_info->has_point_sample_accel;
program->dev.has_gfx6_mrt_export_bug = options->cu_info->has_gfx6_mrt_export_bug;
program->dev.has_fast_fma32 = options->cu_info->has_fast_fma32;
program->dev.has_mac_legacy32 = program->gfx_level <= GFX7 || program->gfx_level == GFX10;

1
src/amd/compiler/aco_ir.h
View file

@ -2250,6 +2250,7 @@ struct DeviceInfo {
bool xnack_enabled = false;
bool sram_ecc_enabled = false;
bool has_point_sample_accel = false;
bool has_gfx6_mrt_export_bug = false;
int32_t scratch_global_offset_min;
int32_t scratch_global_offset_max;

3
src/amd/llvm/ac_llvm_build.c
View file

@ -1470,8 +1470,7 @@ void ac_build_export(struct ac_llvm_context *ctx, struct ac_export_args *a)
* X writemask component.
*/
unsigned enabled_channels = a->enabled_channels;
if (ctx->gfx_level == GFX6 && ctx->info->family != CHIP_OLAND &&
ctx->info->family != CHIP_HAINAN && enabled_channels &&
if (ctx->info->cu_info.has_gfx6_mrt_export_bug && enabled_channels &&
a->target <= V_008DFC_SQ_EXP_MRTZ) {
enabled_channels |= 1;
}