diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index caddcdaabb4..6aafd6aafec 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -538,15 +538,6 @@ fs_inst::can_change_types() const
             !src[1].abs && !src[1].negate && src[1].file != ATTR));
 }
 
-/** Generic unset register constructor. */
-fs_reg::fs_reg()
-{
-   memset((void*)this, 0, sizeof(*this));
-   type = BRW_TYPE_UD;
-   stride = 1;
-   this->file = BAD_FILE;
-}
-
 bool
 brw_reg::equals(const brw_reg &r) const
 {
diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp
index 66aff2becc7..a6d03286ec1 100644
--- a/src/intel/compiler/brw_fs_generator.cpp
+++ b/src/intel/compiler/brw_fs_generator.cpp
@@ -65,8 +65,8 @@ brw_math_function(enum opcode op)
 }
 
 static struct brw_reg
-brw_reg_from_fs_reg(const struct intel_device_info *devinfo, fs_inst *inst,
-                    fs_reg *reg)
+normalize_brw_reg_for_encoding(brw_reg *reg)
+
 {
    struct brw_reg brw_reg;
 
@@ -860,7 +860,7 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width,
       }
 
       for (unsigned int i = 0; i < inst->sources; i++) {
-         src[i] = brw_reg_from_fs_reg(devinfo, inst, &inst->src[i]);
+         src[i] = normalize_brw_reg_for_encoding(&inst->src[i]);
 	 /* The accumulator result appears to get used for the
 	  * conditional modifier generation.  When negating a UD
 	  * value, there is a 33rd bit generated for the sign in the
@@ -871,7 +871,7 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width,
 		inst->src[i].type != BRW_TYPE_UD ||
 		!inst->src[i].negate);
       }
-      dst = brw_reg_from_fs_reg(devinfo, inst, &inst->dst);
+      dst = normalize_brw_reg_for_encoding(&inst->dst);
 
       brw_set_default_access_mode(p, BRW_ALIGN_1);
       brw_set_default_predicate_control(p, inst->predicate);
diff --git a/src/intel/compiler/brw_ir_fs.h b/src/intel/compiler/brw_ir_fs.h
index ca1f9b86ed1..44148986663 100644
--- a/src/intel/compiler/brw_ir_fs.h
+++ b/src/intel/compiler/brw_ir_fs.h
@@ -28,11 +28,7 @@
 #include "brw_ir.h"
 #include "brw_ir_allocator.h"
 
-class fs_reg : public brw_reg {
-public:
-   fs_reg();
-   fs_reg(struct ::brw_reg reg) : brw_reg(reg) {}
-};
+using fs_reg = brw_reg;
 
 static inline fs_reg
 horiz_offset(const fs_reg &reg, unsigned delta)
diff --git a/src/intel/compiler/brw_reg.h b/src/intel/compiler/brw_reg.h
index 953774ce22b..32e2adc0297 100644
--- a/src/intel/compiler/brw_reg.h
+++ b/src/intel/compiler/brw_reg.h
@@ -154,7 +154,7 @@ uint32_t brw_swizzle_immediate(enum brw_reg_type type, uint32_t x, unsigned swz)
  * WM programs to implement shaders decomposed into "channel serial"
  * or "structure of array" form:
  */
-struct brw_reg {
+typedef struct brw_reg {
    union {
       struct {
          enum brw_reg_type type:5;
@@ -195,6 +195,17 @@ struct brw_reg {
    uint8_t stride;
 
 #ifdef __cplusplus
+   /* TODO: Remove this constructor to make this type a POD.  To achieve this
+    * we need to make sure the zero value (currently ARF_NULL) is a good
+    * replacement for BAD_FILE or make the zero value BAD_FILE.
+    */
+   brw_reg() {
+      memset((void*)this, 0, sizeof(*this));
+      this->type = BRW_TYPE_UD;
+      this->stride = 1;
+      this->file = BAD_FILE;
+   }
+
    bool equals(const brw_reg &r) const;
    bool negative_equals(const brw_reg &r) const;
    bool is_contiguous() const;
@@ -211,7 +222,7 @@ struct brw_reg {
     */
    unsigned component_size(unsigned width) const;
 #endif /* __cplusplus */
-};
+} brw_reg;
 
 static inline unsigned
 phys_nr(const struct intel_device_info *devinfo, const struct brw_reg reg)