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radeonsi: fix clip/cull distance gathering for mesh shaders
clipdist_mask was always 0. Just merge the codepaths to reuse what we have for VS/TES/GS. Reviewed-by: Qiang Yu <yuq825@gmail.com> Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39147>
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1 changed files with 42 additions and 32 deletions
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@ -275,39 +275,52 @@ static void gather_io_instrinsic(const nir_shader *nir, struct si_shader_info *i
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info->gs_writes_stream0 |= writes_stream0;
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info->num_outputs = MAX2(info->num_outputs, loc + 1);
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if (nir->info.stage == MESA_SHADER_VERTEX ||
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nir->info.stage == MESA_SHADER_TESS_CTRL ||
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nir->info.stage == MESA_SHADER_TESS_EVAL ||
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nir->info.stage == MESA_SHADER_GEOMETRY) {
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if (slot_semantic == VARYING_SLOT_TESS_LEVEL_INNER ||
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slot_semantic == VARYING_SLOT_TESS_LEVEL_OUTER) {
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if (!nir_intrinsic_io_semantics(intr).no_varying) {
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unsigned index = ac_shader_io_get_unique_index_patch(slot_semantic);
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info->num_tess_level_vram_outputs =
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MAX2(info->num_tess_level_vram_outputs, index + 1);
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}
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} else if ((slot_semantic <= VARYING_SLOT_VAR31 ||
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slot_semantic >= VARYING_SLOT_VAR0_16BIT) &&
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slot_semantic != VARYING_SLOT_EDGE) {
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uint64_t bit = BITFIELD64_BIT(si_shader_io_get_unique_index(slot_semantic));
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switch (nir->info.stage) {
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case MESA_SHADER_TESS_CTRL:
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if ((slot_semantic == VARYING_SLOT_TESS_LEVEL_INNER ||
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slot_semantic == VARYING_SLOT_TESS_LEVEL_OUTER) &&
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!nir_intrinsic_io_semantics(intr).no_varying) {
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unsigned index = ac_shader_io_get_unique_index_patch(slot_semantic);
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info->num_tess_level_vram_outputs =
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MAX2(info->num_tess_level_vram_outputs, index + 1);
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}
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break;
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case MESA_SHADER_VERTEX:
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case MESA_SHADER_TESS_EVAL:
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case MESA_SHADER_GEOMETRY:
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case MESA_SHADER_MESH:
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if ((slot_semantic <= VARYING_SLOT_VAR31 ||
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slot_semantic >= VARYING_SLOT_VAR0_16BIT) &&
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slot_semantic != VARYING_SLOT_EDGE) {
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/* Ignore outputs that are not passed from VS to PS. */
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if (slot_semantic != VARYING_SLOT_POS &&
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slot_semantic != VARYING_SLOT_PSIZ &&
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slot_semantic != VARYING_SLOT_CLIP_VERTEX &&
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slot_semantic != VARYING_SLOT_LAYER &&
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writes_stream0)
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info->outputs_written_before_ps |= bit;
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slot_semantic != VARYING_SLOT_PRIMITIVE_INDICES &&
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writes_stream0) {
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info->outputs_written_before_ps |=
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BITFIELD64_BIT(si_shader_io_get_unique_index(slot_semantic));
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}
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/* LAYER and VIEWPORT have no effect if they don't feed the rasterizer. */
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if (slot_semantic != VARYING_SLOT_LAYER &&
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slot_semantic != VARYING_SLOT_VIEWPORT)
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info->ls_es_outputs_written |= bit;
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if ((nir->info.stage == MESA_SHADER_VERTEX ||
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nir->info.stage == MESA_SHADER_TESS_EVAL) &&
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/* LAYER and VIEWPORT have no effect if they don't feed the rasterizer. */
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slot_semantic != VARYING_SLOT_LAYER &&
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slot_semantic != VARYING_SLOT_VIEWPORT) {
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info->ls_es_outputs_written |=
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BITFIELD64_BIT(si_shader_io_get_unique_index(slot_semantic));
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}
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/* Clip distances must be gathered manually because nir_opt_clip_cull_const
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* can reduce their number.
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*/
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if ((slot_semantic == VARYING_SLOT_CLIP_DIST0 ||
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if ((nir->info.stage == MESA_SHADER_VERTEX ||
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nir->info.stage == MESA_SHADER_TESS_EVAL ||
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nir->info.stage == MESA_SHADER_GEOMETRY ||
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nir->info.stage == MESA_SHADER_MESH) &&
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(slot_semantic == VARYING_SLOT_CLIP_DIST0 ||
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slot_semantic == VARYING_SLOT_CLIP_DIST1) &&
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!nir_intrinsic_io_semantics(intr).no_sysval_output) {
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assert(!indirect);
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@ -323,17 +336,9 @@ static void gather_io_instrinsic(const nir_shader *nir, struct si_shader_info *i
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}
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}
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}
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} else if (nir->info.stage == MESA_SHADER_MESH) {
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if (slot_semantic != VARYING_SLOT_POS &&
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slot_semantic != VARYING_SLOT_PSIZ &&
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slot_semantic != VARYING_SLOT_LAYER &&
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slot_semantic != VARYING_SLOT_PRIMITIVE_INDICES) {
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info->outputs_written_before_ps |=
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BITFIELD64_BIT(si_shader_io_get_unique_index(slot_semantic));
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}
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}
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break;
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if (nir->info.stage == MESA_SHADER_FRAGMENT) {
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case MESA_SHADER_FRAGMENT: {
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int color_index = mesa_frag_result_get_color_index(semantic);
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if (color_index != -1) {
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@ -344,6 +349,11 @@ static void gather_io_instrinsic(const nir_shader *nir, struct si_shader_info *i
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else if (nir_intrinsic_src_type(intr) == nir_type_uint16)
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info->output_color_types |= SI_TYPE_UINT16 << (color_index * 2);
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}
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break;
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}
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default:
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break;
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}
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}
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}
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