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r300g: Remove comma at end of enumerator list.

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This commit is contained in:
Vinson Lee 2010-01-03 15:07:35 -08:00
parent 0bfc579bd4
commit fe3ea299bf
1 changed files with 8 additions and 8 deletions
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16
src/gallium/drivers/r300/r300_reg.h
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@ -2636,7 +2636,7 @@ enum {
VE_COND_MUX_GTE = 25,
VE_SET_GREATER_THAN = 26,
VE_SET_EQUAL = 27,
VE_SET_NOT_EQUAL = 28,
VE_SET_NOT_EQUAL = 28
};
enum {
@ -2670,20 +2670,20 @@ enum {
ME_PRED_SET_CLR = 25,
ME_PRED_SET_INV = 26,
ME_PRED_SET_POP = 27,
ME_PRED_SET_RESTORE = 28,
ME_PRED_SET_RESTORE = 28
};
enum {
/* R3XX */
PVS_MACRO_OP_2CLK_MADD = 0,
PVS_MACRO_OP_2CLK_M2X_ADD = 1,
PVS_MACRO_OP_2CLK_M2X_ADD = 1
};
enum {
PVS_SRC_REG_TEMPORARY = 0, /* Intermediate Storage */
PVS_SRC_REG_INPUT = 1, /* Input Vertex Storage */
PVS_SRC_REG_CONSTANT = 2, /* Constant State Storage */
PVS_SRC_REG_ALT_TEMPORARY = 3, /* Alternate Intermediate Storage */
PVS_SRC_REG_ALT_TEMPORARY = 3 /* Alternate Intermediate Storage */
};
enum {
@ -2692,7 +2692,7 @@ enum {
PVS_DST_REG_OUT = 2, /* Output Memory. Used for all outputs */
PVS_DST_REG_OUT_REPL_X = 3, /* Output Memory & Replicate X to all channels */
PVS_DST_REG_ALT_TEMPORARY = 4, /* Alternate Intermediate Storage */
PVS_DST_REG_INPUT = 5, /* Output Memory & Replicate X to all channels */
PVS_DST_REG_INPUT = 5 /* Output Memory & Replicate X to all channels */
};
enum {
@ -2701,7 +2701,7 @@ enum {
PVS_SRC_SELECT_Z = 2, /* Select Z Component */
PVS_SRC_SELECT_W = 3, /* Select W Component */
PVS_SRC_SELECT_FORCE_0 = 4, /* Force Component to 0.0 */
PVS_SRC_SELECT_FORCE_1 = 5, /* Force Component to 1.0 */
PVS_SRC_SELECT_FORCE_1 = 5 /* Force Component to 1.0 */
};
/* PVS Opcode & Destination Operand Description */
@ -2740,7 +2740,7 @@ enum {
PVS_DST_ADDR_SEL_MASK = 0x3,
PVS_DST_ADDR_SEL_SHIFT = 29,
PVS_DST_ADDR_MODE_0_MASK = 0x1,
PVS_DST_ADDR_MODE_0_SHIFT = 31,
PVS_DST_ADDR_MODE_0_SHIFT = 31
};
/* PVS Source Operand Description */
@ -2775,7 +2775,7 @@ enum {
PVS_SRC_ADDR_SEL_MASK = 0x3,
PVS_SRC_ADDR_SEL_SHIFT = 29,
PVS_SRC_ADDR_MODE_1_MASK = 0x0,
PVS_SRC_ADDR_MODE_1_SHIFT = 32,
PVS_SRC_ADDR_MODE_1_SHIFT = 32
};
/*\}*/