From fe165f4e2acc677007f5a511b3db545bbfd0cbb9 Mon Sep 17 00:00:00 2001 From: Vitaliy Triang3l Kuzmin Date: Tue, 12 Aug 2025 02:47:11 +0300 Subject: [PATCH] radeonsi: Disable TC-compatible HTILE when bug workarounds conflict MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit GFX1013 has bugs that need mutually exclusive workarounds. Reviewed-by: Marek Olšák Signed-off-by: Vitaliy Triang3l Kuzmin Part-of: --- src/gallium/drivers/radeonsi/si_texture.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeonsi/si_texture.c b/src/gallium/drivers/radeonsi/si_texture.c index 2b4593b7ee3..421b9661939 100644 --- a/src/gallium/drivers/radeonsi/si_texture.c +++ b/src/gallium/drivers/radeonsi/si_texture.c @@ -254,7 +254,16 @@ static int si_init_surface(struct si_screen *sscreen, struct radeon_surf *surfac (ptex->bind & PIPE_BIND_SHARED) || is_imported) { flags |= RADEON_SURF_NO_HTILE; } else if (tc_compatible_htile && - (sscreen->info.gfx_level >= GFX9 || array_mode == RADEON_SURF_MODE_2D)) { + (sscreen->info.gfx_level >= GFX9 || array_mode == RADEON_SURF_MODE_2D) && + !(sscreen->info.has_htile_stencil_mipmap_bug && + sscreen->info.has_htile_tc_z_clear_bug_without_stencil && + ptex->last_level > 0)) { + /* On GFX1013, TILE_STENCIL_DISABLE = 0 is needed to work around the hardware bug that + * may cause the Z clear value used by TC to be inverted, but stencil texturing with + * HTILE doesn't work with mipmapping on GFX10, so not enabling TC-compatible HTILE on + * GFX1013 if both bugs checked above can't be worked around at once (with mipmaps). + */ + /* TC-compatible HTILE only supports Z32_FLOAT. * GFX9 also supports Z16_UNORM. * On GFX8, promote Z16 to Z32. DB->CB copies will convert