diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index 0ad42cfca55..ee697fcff97 100644 --- a/src/amd/vulkan/radv_shader.c +++ b/src/amd/vulkan/radv_shader.c @@ -1052,7 +1052,6 @@ radv_shader_spirv_to_nir(struct radv_device *device, const struct radv_pipeline_ const nir_opt_access_options opt_access_options = { .is_vulkan = true, - .infer_non_readable = true, }; NIR_PASS(_, nir, nir_opt_access, &opt_access_options); diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h index 2342662ad21..97fb482c83a 100644 --- a/src/compiler/nir/nir.h +++ b/src/compiler/nir/nir.h @@ -5511,7 +5511,6 @@ bool nir_opt_comparison_pre(nir_shader *shader); typedef struct nir_opt_access_options { bool is_vulkan; - bool infer_non_readable; } nir_opt_access_options; bool nir_opt_access(nir_shader *shader, const nir_opt_access_options *options); diff --git a/src/compiler/nir/nir_opt_access.c b/src/compiler/nir/nir_opt_access.c index 3d4fce2db24..733da8dcc61 100644 --- a/src/compiler/nir/nir_opt_access.c +++ b/src/compiler/nir/nir_opt_access.c @@ -39,7 +39,6 @@ struct access_state { nir_shader *shader; - bool infer_non_readable; struct set *vars_written; struct set *vars_read; @@ -210,7 +209,7 @@ process_variable(struct access_state *state, nir_variable *var) access |= ACCESS_NON_WRITEABLE; } - if (state->infer_non_readable && !(access & ACCESS_NON_READABLE)) { + if (!(access & ACCESS_NON_READABLE)) { if (is_buffer ? !state->buffers_read : !state->images_read) access |= ACCESS_NON_READABLE; else if ((access & ACCESS_RESTRICT) && !_mesa_set_search(state->vars_read, var)) @@ -250,7 +249,7 @@ update_access(struct access_state *state, nir_intrinsic_instr *instr, bool is_bu if (is_memory_readonly) access |= ACCESS_NON_WRITEABLE; - if (state->infer_non_readable && is_memory_writeonly) + if (is_memory_writeonly) access |= ACCESS_NON_READABLE; if (!(access & ACCESS_VOLATILE) && is_memory_readonly) access |= ACCESS_CAN_REORDER; @@ -327,7 +326,6 @@ nir_opt_access(nir_shader *shader, const nir_opt_access_options *options) { struct access_state state = { .shader = shader, - .infer_non_readable = options->infer_non_readable, .vars_written = _mesa_pointer_set_create(NULL), .vars_read = _mesa_pointer_set_create(NULL), }; diff --git a/src/freedreno/vulkan/tu_shader.c b/src/freedreno/vulkan/tu_shader.c index 9ffce6cb87d..e485f8f5c7d 100644 --- a/src/freedreno/vulkan/tu_shader.c +++ b/src/freedreno/vulkan/tu_shader.c @@ -778,7 +778,6 @@ tu_shader_create(struct tu_device *dev, NIR_PASS_V(nir, nir_opt_access, &(nir_opt_access_options) { .is_vulkan = true, - .infer_non_readable = true, }); if (nir->info.stage == MESA_SHADER_FRAGMENT) { diff --git a/src/imagination/rogue/rogue_nir.c b/src/imagination/rogue/rogue_nir.c index 3fe90b47abd..9c6be45cc54 100644 --- a/src/imagination/rogue/rogue_nir.c +++ b/src/imagination/rogue/rogue_nir.c @@ -102,7 +102,6 @@ bool rogue_nir_passes(struct rogue_build_ctx *ctx, /* Optimize GL access qualifiers. */ const nir_opt_access_options opt_access_options = { .is_vulkan = true, - .infer_non_readable = true, }; NIR_PASS_V(nir, nir_opt_access, &opt_access_options); diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c index 87de5a90b4b..56b5b9c1824 100644 --- a/src/intel/vulkan/anv_pipeline.c +++ b/src/intel/vulkan/anv_pipeline.c @@ -288,7 +288,6 @@ anv_shader_stage_to_nir(struct anv_device *device, const nir_opt_access_options opt_access_options = { .is_vulkan = true, - .infer_non_readable = true, }; NIR_PASS(_, nir, nir_opt_access, &opt_access_options); diff --git a/src/intel/vulkan_hasvk/anv_pipeline.c b/src/intel/vulkan_hasvk/anv_pipeline.c index 3df2ab64a11..a0be151af6b 100644 --- a/src/intel/vulkan_hasvk/anv_pipeline.c +++ b/src/intel/vulkan_hasvk/anv_pipeline.c @@ -153,7 +153,6 @@ anv_shader_stage_to_nir(struct anv_device *device, const nir_opt_access_options opt_access_options = { .is_vulkan = true, - .infer_non_readable = true, }; NIR_PASS(_, nir, nir_opt_access, &opt_access_options); diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp b/src/mesa/state_tracker/st_glsl_to_nir.cpp index c2eaf4e6a94..a994e65f81b 100644 --- a/src/mesa/state_tracker/st_glsl_to_nir.cpp +++ b/src/mesa/state_tracker/st_glsl_to_nir.cpp @@ -770,7 +770,6 @@ st_link_nir(struct gl_context *ctx, nir_opt_access_options opt_access_options; opt_access_options.is_vulkan = false; - opt_access_options.infer_non_readable = true; NIR_PASS_V(nir, nir_opt_access, &opt_access_options); } diff --git a/src/microsoft/spirv_to_dxil/dxil_spirv_nir.c b/src/microsoft/spirv_to_dxil/dxil_spirv_nir.c index 1681318ed90..a1182cee0dc 100644 --- a/src/microsoft/spirv_to_dxil/dxil_spirv_nir.c +++ b/src/microsoft/spirv_to_dxil/dxil_spirv_nir.c @@ -640,7 +640,6 @@ dxil_spirv_nir_passes(nir_shader *nir, if (conf->read_only_images_as_srvs) { const nir_opt_access_options opt_access_options = { .is_vulkan = true, - .infer_non_readable = true, }; NIR_PASS_V(nir, nir_opt_access, &opt_access_options); }