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ac/nir: remove pack_clip_cull_distances option
it's always true Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35529>
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7bbc4ef719
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11 changed files with 17 additions and 33 deletions
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@ -165,7 +165,13 @@ typedef struct {
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unsigned max_workgroup_size;
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unsigned wave_size;
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/* The mask of clip and cull distances that the shader should export. */
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/* The mask of clip and cull distances that the shader should export.
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*
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* Clip/cull distance components that are missing in export_clipdist_mask are removed, improving
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* throughput by up to 50% (3 pos exports -> 2 pos exports). The caller shouldn't set no-op
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* components (>= 0) in export_clipdist_mask to remove those completely. No-op components
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* should be determined by nir_opt_clip_cull_const before this.
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*/
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uint8_t export_clipdist_mask;
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/* The mask of clip and cull distances that the shader should cull against.
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* If no clip and cull distance outputs are present, it will load clip planes and cull
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@ -179,12 +185,6 @@ typedef struct {
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*/
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bool dont_export_cull_distances;
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bool write_pos_to_clipvertex;
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/* Remove clip/cull distance components that are missing in export_clipdist_mask, improving
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* throughput by up to 50% (3 pos exports -> 2 pos exports). The caller shouldn't set no-op
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* components (>= 0) in export_clipdist_mask to remove those completely. No-op components
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* should be determined by nir_opt_clip_cull_const before this.
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*/
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bool pack_clip_cull_distances;
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const uint8_t *vs_output_param_offset; /* GFX11+ */
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bool has_param_exports;
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bool can_cull;
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@ -255,7 +255,6 @@ ac_nir_lower_legacy_vs(nir_shader *nir,
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enum amd_gfx_level gfx_level,
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uint32_t export_clipdist_mask,
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bool write_pos_to_clipvertex,
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bool pack_clip_cull_distances,
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const uint8_t *param_offsets,
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bool has_param_exports,
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bool export_primitive_id,
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@ -269,7 +268,6 @@ typedef struct {
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enum amd_gfx_level gfx_level;
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uint32_t export_clipdist_mask;
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bool write_pos_to_clipvertex;
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bool pack_clip_cull_distances;
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const uint8_t *param_offsets;
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bool has_param_exports;
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bool disable_streamout;
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@ -67,9 +67,8 @@ ac_nir_create_gs_copy_shader(const nir_shader *gs_nir, ac_nir_lower_legacy_gs_op
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if (stream == 0) {
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ac_nir_export_position(&b, options->gfx_level, options->export_clipdist_mask, false,
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options->write_pos_to_clipvertex, options->pack_clip_cull_distances,
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!options->has_param_exports, options->force_vrs,
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b.shader->info.outputs_written | VARYING_BIT_POS,
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options->write_pos_to_clipvertex, !options->has_param_exports,
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options->force_vrs, b.shader->info.outputs_written | VARYING_BIT_POS,
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out, NULL);
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if (options->has_param_exports) {
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@ -128,7 +128,6 @@ ac_nir_export_position(nir_builder *b,
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uint32_t export_clipdist_mask,
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bool dont_export_cull_distances,
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bool write_pos_to_clipvertex,
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bool pack_clip_cull_distances,
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bool no_param_export,
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bool force_vrs,
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uint64_t outputs_written,
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@ -37,7 +37,6 @@ ac_nir_lower_legacy_vs(nir_shader *nir,
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enum amd_gfx_level gfx_level,
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uint32_t export_clipdist_mask,
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bool write_pos_to_clipvertex,
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bool pack_clip_cull_distances,
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const uint8_t *param_offsets,
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bool has_param_exports,
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bool export_primitive_id,
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@ -71,8 +70,7 @@ ac_nir_lower_legacy_vs(nir_shader *nir,
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ac_nir_clamp_vertex_color_outputs(&b, &out);
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ac_nir_export_position(&b, gfx_level, export_clipdist_mask, false, write_pos_to_clipvertex,
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pack_clip_cull_distances, !has_param_exports, force_vrs,
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nir->info.outputs_written | VARYING_BIT_POS,
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!has_param_exports, force_vrs, nir->info.outputs_written | VARYING_BIT_POS,
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&out, NULL);
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if (has_param_exports) {
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@ -1716,7 +1716,6 @@ ac_nir_lower_ngg_nogs(nir_shader *shader, const ac_nir_lower_ngg_options *option
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options->export_clipdist_mask,
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options->dont_export_cull_distances,
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options->write_pos_to_clipvertex,
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options->pack_clip_cull_distances,
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!options->has_param_exports,
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options->force_vrs,
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export_outputs, &state.out, NULL);
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@ -406,7 +406,6 @@ ngg_gs_emit_output(nir_builder *b, nir_def *max_num_out_vtx, nir_def *max_num_ou
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s->options->export_clipdist_mask,
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s->options->dont_export_cull_distances,
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s->options->write_pos_to_clipvertex,
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s->options->pack_clip_cull_distances,
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!s->options->has_param_exports,
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s->options->force_vrs,
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b->shader->info.outputs_written | VARYING_BIT_POS, &s->out, NULL);
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@ -887,7 +887,7 @@ emit_ms_vertex(nir_builder *b, nir_def *index, nir_def *row, bool exports, bool
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ms_emit_arrayed_outputs(b, index, per_vertex_outputs, s);
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if (exports) {
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ac_nir_export_position(b, s->hw_info->gfx_level, s->clipdist_enable_mask, false, false, true,
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ac_nir_export_position(b, s->hw_info->gfx_level, s->clipdist_enable_mask, false, false,
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!s->has_param_exports, false,
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s->per_vertex_outputs | VARYING_BIT_POS, &s->out, row);
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}
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@ -268,7 +268,6 @@ ac_nir_export_position(nir_builder *b,
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uint32_t export_clipdist_mask,
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bool dont_export_cull_distances,
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bool write_pos_to_clipvertex,
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bool pack_clip_cull_distances,
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bool no_param_export,
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bool force_vrs,
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uint64_t outputs_written,
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@ -326,14 +325,11 @@ ac_nir_export_position(nir_builder *b,
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}
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/* If clip/cull distances are sparsely populated or some components are >= 0, pack them. */
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if (pack_clip_cull_distances) {
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unsigned num = 0;
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u_foreach_bit(i, export_clipdist_mask) {
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clip_dist[num++] = clip_dist[i];
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}
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export_clipdist_mask = BITFIELD_MASK(num);
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unsigned num = 0;
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u_foreach_bit(i, export_clipdist_mask) {
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clip_dist[num++] = clip_dist[i];
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}
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export_clipdist_mask = BITFIELD_MASK(num);
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if (outputs_written & VARYING_BIT_POS) {
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/* GFX10 (Navi1x) skip POS0 exports if EXEC=0 and DONE=0, causing a hang.
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@ -489,7 +489,7 @@ radv_postprocess_nir(struct radv_device *device, const struct radv_graphics_stat
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} else if (is_last_vgt_stage) {
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if (stage->stage != MESA_SHADER_GEOMETRY) {
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NIR_PASS(_, stage->nir, ac_nir_lower_legacy_vs, gfx_level,
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stage->info.outinfo.clip_dist_mask | stage->info.outinfo.cull_dist_mask, false, true,
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stage->info.outinfo.clip_dist_mask | stage->info.outinfo.cull_dist_mask, false,
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stage->info.outinfo.vs_output_param_offset, stage->info.outinfo.param_exports,
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stage->info.outinfo.export_prim_id, false, stage->info.force_vrs_per_vertex);
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@ -499,7 +499,6 @@ radv_postprocess_nir(struct radv_device *device, const struct radv_graphics_stat
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.has_pipeline_stats_query = false,
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.gfx_level = pdev->info.gfx_level,
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.export_clipdist_mask = stage->info.outinfo.clip_dist_mask | stage->info.outinfo.cull_dist_mask,
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.pack_clip_cull_distances = true,
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.param_offsets = stage->info.outinfo.vs_output_param_offset,
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.has_param_exports = stage->info.outinfo.param_exports,
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.force_vrs = stage->info.force_vrs_per_vertex,
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@ -792,7 +792,6 @@ radv_lower_ngg(struct radv_device *device, struct radv_shader_stage *ngg_stage,
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options.export_clipdist_mask = info->outinfo.clip_dist_mask | info->outinfo.cull_dist_mask;
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options.cull_clipdist_mask = options.export_clipdist_mask;
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options.dont_export_cull_distances = info->has_ngg_culling;
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options.pack_clip_cull_distances = true;
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options.vs_output_param_offset = info->outinfo.vs_output_param_offset;
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options.has_param_exports = info->outinfo.param_exports || info->outinfo.prim_param_exports;
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options.can_cull = info->has_ngg_culling;
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@ -1129,7 +1129,6 @@ static void si_lower_ngg(struct si_shader *shader, nir_shader *nir,
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shader->info.culldist_mask : 0,
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.dont_export_cull_distances = si_shader_culling_enabled(shader),
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.write_pos_to_clipvertex = shader->key.ge.mono.write_pos_to_clipvertex,
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.pack_clip_cull_distances = true,
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.force_vrs = sel->screen->options.vrs2x2,
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.use_gfx12_xfb_intrinsic = !nir->info.use_aco_amd,
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.skip_viewport_state_culling = sel->info.writes_viewport_index,
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@ -1542,7 +1541,7 @@ static void run_late_optimization_and_lowering_passes(struct si_nir_shader_ctx *
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NIR_PASS(_, nir, ac_nir_lower_legacy_vs,
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sel->screen->info.gfx_level,
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shader->info.clipdist_mask | shader->info.culldist_mask,
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shader->key.ge.mono.write_pos_to_clipvertex, true,
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shader->key.ge.mono.write_pos_to_clipvertex,
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ctx->temp_info.vs_output_param_offset,
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shader->info.nr_param_exports,
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shader->key.ge.mono.u.vs_export_prim_id,
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@ -1560,7 +1559,6 @@ static void run_late_optimization_and_lowering_passes(struct si_nir_shader_ctx *
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.gfx_level = sel->screen->info.gfx_level,
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.export_clipdist_mask = shader->info.clipdist_mask | shader->info.culldist_mask,
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.write_pos_to_clipvertex = shader->key.ge.mono.write_pos_to_clipvertex,
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.pack_clip_cull_distances = true,
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.param_offsets = ctx->temp_info.vs_output_param_offset,
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.has_param_exports = shader->info.nr_param_exports,
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.disable_streamout = !shader->info.num_streamout_vec4s,
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