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freedreno/ir3: shuffle some variant fields
Just to group together the parts that will get serialized when we have shader disk-cache. Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5372>
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1 changed files with 20 additions and 11 deletions
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@ -451,6 +451,10 @@ struct ir3_ibo_mapping {
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/* Represents half register in regid */
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#define HALF_REG_ID 0x100
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/**
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* Shader variant which contains the actual hw shader instructions,
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* and necessary info for shader state setup.
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*/
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struct ir3_shader_variant {
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struct fd_bo *bo;
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@ -468,12 +472,22 @@ struct ir3_shader_variant {
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struct ir3_shader_variant *nonbinning;
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// };
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struct ir3_info info;
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struct ir3 *ir;
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struct ir3 *ir; /* freed after assembling machine instructions */
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/* shader variants form a linked list: */
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struct ir3_shader_variant *next;
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/* replicated here to avoid passing extra ptrs everywhere: */
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gl_shader_stage type;
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struct ir3_shader *shader;
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/* The actual binary shader instructions, size given by info.sizedwords: */
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uint32_t *bin;
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struct ir3_const_state *const_state;
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struct ir3_info info;
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/* Levels of nesting of flow control:
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*/
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unsigned branchstack;
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@ -492,8 +506,6 @@ struct ir3_shader_variant {
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*/
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unsigned constlen;
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struct ir3_const_state *const_state;
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/* About Linkage:
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* + Let the frag shader determine the position/compmask for the
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* varyings, since it is the place where we know if the varying
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@ -610,13 +622,6 @@ struct ir3_shader_variant {
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unsigned orig_idx[16];
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} astc_srgb;
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/* shader variants form a linked list: */
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struct ir3_shader_variant *next;
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/* replicated here to avoid passing extra ptrs everywhere: */
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gl_shader_stage type;
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struct ir3_shader *shader;
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/* texture sampler pre-dispatches */
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uint32_t num_sampler_prefetch;
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struct ir3_sampler_prefetch sampler_prefetch[IR3_MAX_SAMPLER_PREFETCH];
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@ -639,6 +644,10 @@ ir3_shader_stage(struct ir3_shader_variant *v)
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}
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/**
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* Represents a shader at the API level, before state-specific variants are
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* generated.
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*/
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struct ir3_shader {
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gl_shader_stage type;
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