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r600/sfn: lower b2f64 in nir

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Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36587>
This commit is contained in:
Gert Wollny 2024-04-29 21:42:04 +02:00 • committed by Marge Bot
parent f12ad5da70
commit fdaf105178
2 changed files with 7 additions and 27 deletions
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27
src/gallium/drivers/r600/sfn/sfn_instr_alu.cpp
View file

@ -1356,8 +1356,6 @@ emit_alu_op2_64bit_one_dst(const nir_alu_instr& alu,
static bool
emit_alu_fma_64bit(const nir_alu_instr& alu, EAluOp opcode, Shader& shader);
static bool
emit_alu_b2f64(const nir_alu_instr& alu, Shader& shader);
static bool
emit_alu_f2f64(const nir_alu_instr& alu, Shader& shader);
static bool
emit_alu_i2f64(const nir_alu_instr& alu, EAluOp op, Shader& shader);
@ -1491,8 +1489,6 @@ AluInstr::from_nir(nir_alu_instr *alu, Shader& shader)
return emit_alu_op2_64bit(*alu, op2_max_64, shader, false);
case nir_op_fmin:
return emit_alu_op2_64bit(*alu, op2_min_64, shader, false);
case nir_op_b2f64:
return emit_alu_b2f64(*alu, shader);
case nir_op_f2f64:
return emit_alu_f2f64(*alu, shader);
case nir_op_i2f64:
@ -2149,29 +2145,6 @@ emit_alu_fma_64bit(const nir_alu_instr& alu, EAluOp opcode, Shader& shader)
return true;
}
static bool
emit_alu_b2f64(const nir_alu_instr& alu, Shader& shader)
{
auto& value_factory = shader.value_factory();
for (unsigned i = 0; i < alu.def.num_components; ++i) {
auto ir = new AluInstr(op2_and_int,
value_factory.dest(alu.def, 2 * i, pin_group),
value_factory.src(alu.src[0], i),
value_factory.zero(),
{alu_write});
shader.emit_instruction(ir);
ir = new AluInstr(op2_and_int,
value_factory.dest(alu.def, 2 * i + 1, pin_group),
value_factory.src(alu.src[0], i),
value_factory.literal(0x3ff00000),
{alu_write});
shader.emit_instruction(ir);
}
return true;
}
static bool
emit_alu_i2f64(const nir_alu_instr& alu, EAluOp op, Shader& shader)
{

7
src/gallium/drivers/r600/sfn/sfn_nir_lower_64bit.cpp
View file

@ -136,6 +136,7 @@ class LowerSplit64op : public NirLowerInstruction {
auto alu = nir_instr_as_alu(instr);
switch (alu->op) {
case nir_op_bcsel:
case nir_op_b2f64:
return alu->def.bit_size == 64;
case nir_op_f2i32:
case nir_op_f2u32:
@ -219,6 +220,12 @@ class LowerSplit64op : public NirLowerInstruction {
auto fhigh = nir_i2f64(b, high);
return nir_fadd(b, nir_fmul_imm(b, fhigh, 65536.0 * 65536.0), flow);
}
case nir_op_b2f64: {
auto src = nir_b2b32(b, nir_ssa_for_alu_src(b, alu, 0));
return nir_pack_64_2x32_split(b,
nir_imm_zero(b, 1, 32),
nir_iand(b, src, nir_imm_int(b, 0x3ff00000)));
}
default:
UNREACHABLE("trying to lower instruction that was not in filter");
}