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ir3: refactor builders to use ir3_builder API

Browse source 
All functions that used to take an ir3_block as argument to append
instructions to now take an ir3_builder as argument.

Add an ir3_builder field to ir3_context and replace all uses of
ir3_context::block for creating instructions with ir3_context::build.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32088>
This commit is contained in:
Job Noorman 2024-11-30 17:42:25 +01:00 • committed by Marge Bot
parent 6c38402e9a
commit fda91b49d7
18 changed files with 406 additions and 421 deletions
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108
src/freedreno/ir3/ir3.h
View file

@ -2387,12 +2387,12 @@ type_flags(type_t type)
}
static inline struct ir3_instruction *
create_immed_typed_shared(struct ir3_block *block, uint32_t val, type_t type, bool shared)
create_immed_typed_shared(struct ir3_builder *build, uint32_t val, type_t type, bool shared)
{
struct ir3_instruction *mov;
ir3_register_flags flags = type_flags(type);
mov = ir3_instr_create(block, OPC_MOV, 1, 1);
mov = ir3_build_instr(build, OPC_MOV, 1, 1);
mov->cat1.src_type = type;
mov->cat1.dst_type = type;
__ssa_dst(mov)->flags |= flags | (shared ? IR3_REG_SHARED : 0);
@ -2402,30 +2402,30 @@ create_immed_typed_shared(struct ir3_block *block, uint32_t val, type_t type, bo
}
static inline struct ir3_instruction *
create_immed_typed(struct ir3_block *block, uint32_t val, type_t type)
create_immed_typed(struct ir3_builder *build, uint32_t val, type_t type)
{
return create_immed_typed_shared(block, val, type, false);
return create_immed_typed_shared(build, val, type, false);
}
static inline struct ir3_instruction *
create_immed_shared(struct ir3_block *block, uint32_t val, bool shared)
create_immed_shared(struct ir3_builder *build, uint32_t val, bool shared)
{
return create_immed_typed_shared(block, val, TYPE_U32, shared);
return create_immed_typed_shared(build, val, TYPE_U32, shared);
}
static inline struct ir3_instruction *
create_immed(struct ir3_block *block, uint32_t val)
create_immed(struct ir3_builder *build, uint32_t val)
{
return create_immed_shared(block, val, false);
return create_immed_shared(build, val, false);
}
static inline struct ir3_instruction *
create_uniform_typed(struct ir3_block *block, unsigned n, type_t type)
create_uniform_typed(struct ir3_builder *build, unsigned n, type_t type)
{
struct ir3_instruction *mov;
ir3_register_flags flags = type_flags(type);
mov = ir3_instr_create(block, OPC_MOV, 1, 1);
mov = ir3_build_instr(build, OPC_MOV, 1, 1);
mov->cat1.src_type = type;
mov->cat1.dst_type = type;
__ssa_dst(mov)->flags |= flags;
@ -2435,18 +2435,18 @@ create_uniform_typed(struct ir3_block *block, unsigned n, type_t type)
}
static inline struct ir3_instruction *
create_uniform(struct ir3_block *block, unsigned n)
create_uniform(struct ir3_builder *build, unsigned n)
{
return create_uniform_typed(block, n, TYPE_F32);
return create_uniform_typed(build, n, TYPE_F32);
}
static inline struct ir3_instruction *
create_uniform_indirect(struct ir3_block *block, int n, type_t type,
create_uniform_indirect(struct ir3_builder *build, int n, type_t type,
struct ir3_instruction *address)
{
struct ir3_instruction *mov;
mov = ir3_instr_create(block, OPC_MOV, 1, 1);
mov = ir3_build_instr(build, OPC_MOV, 1, 1);
mov->cat1.src_type = type;
mov->cat1.dst_type = type;
__ssa_dst(mov);
@ -2458,9 +2458,9 @@ create_uniform_indirect(struct ir3_block *block, int n, type_t type,
}
static inline struct ir3_instruction *
ir3_MOV(struct ir3_block *block, struct ir3_instruction *src, type_t type)
ir3_MOV(struct ir3_builder *build, struct ir3_instruction *src, type_t type)
{
struct ir3_instruction *instr = ir3_instr_create(block, OPC_MOV, 1, 1);
struct ir3_instruction *instr = ir3_build_instr(build, OPC_MOV, 1, 1);
ir3_register_flags flags = type_flags(type) | (src->dsts[0]->flags & IR3_REG_SHARED);
__ssa_dst(instr)->flags |= flags;
@ -2477,24 +2477,24 @@ ir3_MOV(struct ir3_block *block, struct ir3_instruction *src, type_t type)
}
static inline struct ir3_instruction_rpt
ir3_MOV_rpt(struct ir3_block *block, unsigned nrpt,
ir3_MOV_rpt(struct ir3_builder *build, unsigned nrpt,
struct ir3_instruction_rpt src, type_t type)
{
struct ir3_instruction_rpt dst;
assert(nrpt <= ARRAY_SIZE(dst.rpts));
for (unsigned rpt = 0; rpt < nrpt; ++rpt)
dst.rpts[rpt] = ir3_MOV(block, src.rpts[rpt], type);
dst.rpts[rpt] = ir3_MOV(build, src.rpts[rpt], type);
ir3_instr_create_rpt(dst.rpts, nrpt);
return dst;
}
static inline struct ir3_instruction *
ir3_COV(struct ir3_block *block, struct ir3_instruction *src, type_t src_type,
ir3_COV(struct ir3_builder *build, struct ir3_instruction *src, type_t src_type,
type_t dst_type)
{
struct ir3_instruction *instr = ir3_instr_create(block, OPC_MOV, 1, 1);
struct ir3_instruction *instr = ir3_build_instr(build, OPC_MOV, 1, 1);
ir3_register_flags dst_flags = type_flags(dst_type) | (src->dsts[0]->flags & IR3_REG_SHARED);
ASSERTED ir3_register_flags src_flags = type_flags(src_type);
@ -2509,22 +2509,22 @@ ir3_COV(struct ir3_block *block, struct ir3_instruction *src, type_t src_type,
}
static inline struct ir3_instruction_rpt
ir3_COV_rpt(struct ir3_block *block, unsigned nrpt,
ir3_COV_rpt(struct ir3_builder *build, unsigned nrpt,
struct ir3_instruction_rpt src, type_t src_type, type_t dst_type)
{
struct ir3_instruction_rpt dst;
for (unsigned rpt = 0; rpt < nrpt; ++rpt)
dst.rpts[rpt] = ir3_COV(block, src.rpts[rpt], src_type, dst_type);
dst.rpts[rpt] = ir3_COV(build, src.rpts[rpt], src_type, dst_type);
ir3_instr_create_rpt(dst.rpts, nrpt);
return dst;
}
static inline struct ir3_instruction *
ir3_MOVMSK(struct ir3_block *block, unsigned components)
ir3_MOVMSK(struct ir3_builder *build, unsigned components)
{
struct ir3_instruction *instr = ir3_instr_create(block, OPC_MOVMSK, 1, 0);
struct ir3_instruction *instr = ir3_build_instr(build, OPC_MOVMSK, 1, 0);
struct ir3_register *dst = __ssa_dst(instr);
dst->flags |= IR3_REG_SHARED;
@ -2534,11 +2534,11 @@ ir3_MOVMSK(struct ir3_block *block, unsigned components)
}
static inline struct ir3_instruction *
ir3_BALLOT_MACRO(struct ir3_block *block, struct ir3_instruction *src,
ir3_BALLOT_MACRO(struct ir3_builder *build, struct ir3_instruction *src,
unsigned components)
{
struct ir3_instruction *instr =
ir3_instr_create(block, OPC_BALLOT_MACRO, 1, 1);
ir3_build_instr(build, OPC_BALLOT_MACRO, 1, 1);
struct ir3_register *dst = __ssa_dst(instr);
dst->flags |= IR3_REG_SHARED;
@ -2551,9 +2551,9 @@ ir3_BALLOT_MACRO(struct ir3_block *block, struct ir3_instruction *src,
/* clang-format off */
#define __INSTR0(flag, name, opc) \
static inline struct ir3_instruction *ir3_##name(struct ir3_block *block) \
static inline struct ir3_instruction *ir3_##name(struct ir3_builder *build) \
{ \
struct ir3_instruction *instr = ir3_instr_create(block, opc, 1, 0); \
struct ir3_instruction *instr = ir3_build_instr(build, opc, 1, 0); \
instr->flags |= flag; \
return instr; \
}
@ -2564,10 +2564,10 @@ static inline struct ir3_instruction *ir3_##name(struct ir3_block *block) \
/* clang-format off */
#define __INSTR1(flag, dst_count, name, opc, scalar_alu) \
static inline struct ir3_instruction *ir3_##name( \
struct ir3_block *block, struct ir3_instruction *a, unsigned aflags) \
struct ir3_builder *build, struct ir3_instruction *a, unsigned aflags) \
{ \
struct ir3_instruction *instr = \
ir3_instr_create(block, opc, dst_count, 1); \
ir3_build_instr(build, opc, dst_count, 1); \
unsigned dst_flag = scalar_alu ? (a->dsts[0]->flags & IR3_REG_SHARED) : 0; \
for (unsigned i = 0; i < dst_count; i++) \
__ssa_dst(instr)->flags |= dst_flag; \
@ -2576,13 +2576,13 @@ static inline struct ir3_instruction *ir3_##name( \
return instr; \
} \
static inline struct ir3_instruction_rpt ir3_##name##_rpt( \
struct ir3_block *block, unsigned nrpt, \
struct ir3_builder *build, unsigned nrpt, \
struct ir3_instruction_rpt a, unsigned aflags) \
{ \
struct ir3_instruction_rpt dst; \
assert(nrpt <= ARRAY_SIZE(dst.rpts)); \
for (unsigned rpt = 0; rpt < nrpt; rpt++) \
dst.rpts[rpt] = ir3_##name(block, a.rpts[rpt], aflags); \
dst.rpts[rpt] = ir3_##name(build, a.rpts[rpt], aflags); \
ir3_instr_create_rpt(dst.rpts, nrpt); \
return dst; \
}
@ -2597,10 +2597,10 @@ static inline struct ir3_instruction_rpt ir3_##name##_rpt( \
/* clang-format off */
#define __INSTR2(flag, dst_count, name, opc, scalar_alu) \
static inline struct ir3_instruction *ir3_##name( \
struct ir3_block *block, struct ir3_instruction *a, unsigned aflags, \
struct ir3_builder *build, struct ir3_instruction *a, unsigned aflags, \
struct ir3_instruction *b, unsigned bflags) \
{ \
struct ir3_instruction *instr = ir3_instr_create(block, opc, dst_count, 2); \
struct ir3_instruction *instr = ir3_build_instr(build, opc, dst_count, 2); \
unsigned dst_flag = scalar_alu ? (a->dsts[0]->flags & b->dsts[0]->flags & \
IR3_REG_SHARED) : 0; \
for (unsigned i = 0; i < dst_count; i++) \
@ -2611,14 +2611,14 @@ static inline struct ir3_instruction *ir3_##name( \
return instr; \
} \
static inline struct ir3_instruction_rpt ir3_##name##_rpt( \
struct ir3_block *block, unsigned nrpt, \
struct ir3_builder *build, unsigned nrpt, \
struct ir3_instruction_rpt a, unsigned aflags, \
struct ir3_instruction_rpt b, unsigned bflags) \
{ \
struct ir3_instruction_rpt dst; \
assert(nrpt <= ARRAY_SIZE(dst.rpts)); \
for (unsigned rpt = 0; rpt < nrpt; rpt++) { \
dst.rpts[rpt] = ir3_##name(block, a.rpts[rpt], aflags, \
dst.rpts[rpt] = ir3_##name(build, a.rpts[rpt], aflags, \
b.rpts[rpt], bflags); \
} \
ir3_instr_create_rpt(dst.rpts, nrpt); \
@ -2634,12 +2634,12 @@ static inline struct ir3_instruction_rpt ir3_##name##_rpt( \
/* clang-format off */
#define __INSTR3(flag, dst_count, name, opc, scalar_alu) \
static inline struct ir3_instruction *ir3_##name( \
struct ir3_block *block, struct ir3_instruction *a, unsigned aflags, \
struct ir3_builder *build, struct ir3_instruction *a, unsigned aflags, \
struct ir3_instruction *b, unsigned bflags, struct ir3_instruction *c, \
unsigned cflags) \
{ \
struct ir3_instruction *instr = \
ir3_instr_create(block, opc, dst_count, 3); \
ir3_build_instr(build, opc, dst_count, 3); \
unsigned dst_flag = scalar_alu ? (a->dsts[0]->flags & b->dsts[0]->flags & \
c->dsts[0]->flags & IR3_REG_SHARED) : 0; \
for (unsigned i = 0; i < dst_count; i++) \
@ -2651,7 +2651,7 @@ static inline struct ir3_instruction *ir3_##name( \
return instr; \
} \
static inline struct ir3_instruction_rpt ir3_##name##_rpt( \
struct ir3_block *block, unsigned nrpt, \
struct ir3_builder *build, unsigned nrpt, \
struct ir3_instruction_rpt a, unsigned aflags, \
struct ir3_instruction_rpt b, unsigned bflags, \
struct ir3_instruction_rpt c, unsigned cflags) \
@ -2659,7 +2659,7 @@ static inline struct ir3_instruction_rpt ir3_##name##_rpt( \
struct ir3_instruction_rpt dst; \
assert(nrpt <= ARRAY_SIZE(dst.rpts)); \
for (unsigned rpt = 0; rpt < nrpt; rpt++) { \
dst.rpts[rpt] = ir3_##name(block, a.rpts[rpt], aflags, \
dst.rpts[rpt] = ir3_##name(build, a.rpts[rpt], aflags, \
b.rpts[rpt], bflags, \
c.rpts[rpt], cflags); \
} \
@ -2676,12 +2676,12 @@ static inline struct ir3_instruction_rpt ir3_##name##_rpt( \
/* clang-format off */
#define __INSTR4(flag, dst_count, name, opc) \
static inline struct ir3_instruction *ir3_##name( \
struct ir3_block *block, struct ir3_instruction *a, unsigned aflags, \
struct ir3_builder *build, struct ir3_instruction *a, unsigned aflags, \
struct ir3_instruction *b, unsigned bflags, struct ir3_instruction *c, \
unsigned cflags, struct ir3_instruction *d, unsigned dflags) \
{ \
struct ir3_instruction *instr = \
ir3_instr_create(block, opc, dst_count, 4); \
ir3_build_instr(build, opc, dst_count, 4); \
for (unsigned i = 0; i < dst_count; i++) \
__ssa_dst(instr); \
__ssa_src(instr, a, aflags); \
@ -2699,12 +2699,12 @@ static inline struct ir3_instruction *ir3_##name( \
/* clang-format off */
#define __INSTR5(flag, name, opc) \
static inline struct ir3_instruction *ir3_##name( \
struct ir3_block *block, struct ir3_instruction *a, unsigned aflags, \
struct ir3_builder *build, struct ir3_instruction *a, unsigned aflags, \
struct ir3_instruction *b, unsigned bflags, struct ir3_instruction *c, \
unsigned cflags, struct ir3_instruction *d, unsigned dflags, \
struct ir3_instruction *e, unsigned eflags) \
{ \
struct ir3_instruction *instr = ir3_instr_create(block, opc, 1, 5); \
struct ir3_instruction *instr = ir3_build_instr(build, opc, 1, 5); \
__ssa_dst(instr); \
__ssa_src(instr, a, aflags); \
__ssa_src(instr, b, bflags); \
@ -2721,13 +2721,13 @@ static inline struct ir3_instruction *ir3_##name( \
/* clang-format off */
#define __INSTR6(flag, dst_count, name, opc) \
static inline struct ir3_instruction *ir3_##name( \
struct ir3_block *block, struct ir3_instruction *a, unsigned aflags, \
struct ir3_builder *build, struct ir3_instruction *a, unsigned aflags, \
struct ir3_instruction *b, unsigned bflags, struct ir3_instruction *c, \
unsigned cflags, struct ir3_instruction *d, unsigned dflags, \
struct ir3_instruction *e, unsigned eflags, struct ir3_instruction *f, \
unsigned fflags) \
{ \
struct ir3_instruction *instr = ir3_instr_create(block, opc, 1, 6); \
struct ir3_instruction *instr = ir3_build_instr(build, opc, 1, 6); \
for (unsigned i = 0; i < dst_count; i++) \
__ssa_dst(instr); \
__ssa_src(instr, a, aflags); \
@ -2773,19 +2773,19 @@ INSTR2(READ_COND_MACRO)
INSTR1(READ_GETLAST_MACRO)
static inline struct ir3_instruction *
ir3_ELECT_MACRO(struct ir3_block *block)
ir3_ELECT_MACRO(struct ir3_builder *build)
{
struct ir3_instruction *instr =
ir3_instr_create(block, OPC_ELECT_MACRO, 1, 0);
ir3_build_instr(build, OPC_ELECT_MACRO, 1, 0);
__ssa_dst(instr);
return instr;
}
static inline struct ir3_instruction *
ir3_SHPS_MACRO(struct ir3_block *block)
ir3_SHPS_MACRO(struct ir3_builder *build)
{
struct ir3_instruction *instr =
ir3_instr_create(block, OPC_SHPS_MACRO, 1, 0);
ir3_build_instr(build, OPC_SHPS_MACRO, 1, 0);
__ssa_dst(instr);
return instr;
}
@ -2887,7 +2887,7 @@ INSTR1F(3D, DSY)
INSTR1(RGETPOS)
static inline struct ir3_instruction *
ir3_SAM(struct ir3_block *block, opc_t opc, type_t type, unsigned wrmask,
ir3_SAM(struct ir3_builder *build, opc_t opc, type_t type, unsigned wrmask,
ir3_instruction_flags flags, struct ir3_instruction *samp_tex,
struct ir3_instruction *src0, struct ir3_instruction *src1)
{
@ -2904,7 +2904,7 @@ ir3_SAM(struct ir3_block *block, opc_t opc, type_t type, unsigned wrmask,
nreg++;
}
sam = ir3_instr_create(block, opc, 1, nreg);
sam = ir3_build_instr(build, opc, 1, nreg);
sam->flags |= flags;
__ssa_dst(sam)->wrmask = wrmask;
if (flags & IR3_INSTR_S2EN) {
@ -2932,12 +2932,12 @@ ir3_SAM(struct ir3_block *block, opc_t opc, type_t type, unsigned wrmask,
* argument (the initial value of rx) and tie it to the destination.
*/
static inline struct ir3_instruction *
ir3_BRCST_ACTIVE(struct ir3_block *block, unsigned cluster_size,
ir3_BRCST_ACTIVE(struct ir3_builder *build, unsigned cluster_size,
struct ir3_instruction *src,
struct ir3_instruction *dst_default)
{
struct ir3_instruction *brcst =
ir3_instr_create(block, OPC_BRCST_ACTIVE, 1, 2);
ir3_build_instr(build, OPC_BRCST_ACTIVE, 1, 2);
brcst->cat5.cluster_size = cluster_size;
brcst->cat5.type = TYPE_U32;
struct ir3_register *brcst_dst = __ssa_dst(brcst);

26
src/freedreno/ir3/ir3_a4xx.c
View file

@ -32,7 +32,7 @@ byte_offset_to_address(struct ir3_context *ctx,
nir_src *ssbo,
struct ir3_instruction *byte_offset)
{
struct ir3_block *b = ctx->block;
struct ir3_builder *b = &ctx->build;
if (ctx->compiler->gen == 4) {
uint32_t index = nir_src_as_uint(*ssbo);
@ -52,7 +52,7 @@ static void
emit_intrinsic_load_ssbo(struct ir3_context *ctx, nir_intrinsic_instr *intr,
struct ir3_instruction **dst)
{
struct ir3_block *b = ctx->block;
struct ir3_builder *b = &ctx->build;
struct ir3_instruction *ldgb, *src0, *src1, *byte_offset, *offset;
struct ir3_instruction *ssbo = ir3_ssbo_to_ibo(ctx, intr->src[0]);
@ -79,7 +79,7 @@ emit_intrinsic_load_ssbo(struct ir3_context *ctx, nir_intrinsic_instr *intr,
static void
emit_intrinsic_store_ssbo(struct ir3_context *ctx, nir_intrinsic_instr *intr)
{
struct ir3_block *b = ctx->block;
struct ir3_builder *b = &ctx->build;
struct ir3_instruction *stgb, *src0, *src1, *src2, *byte_offset, *offset;
unsigned wrmask = nir_intrinsic_write_mask(intr);
unsigned ncomp = ffs(~wrmask) - 1;
@ -105,11 +105,11 @@ emit_intrinsic_store_ssbo(struct ir3_context *ctx, nir_intrinsic_instr *intr)
stgb->barrier_class = IR3_BARRIER_BUFFER_W;
stgb->barrier_conflict = IR3_BARRIER_BUFFER_R | IR3_BARRIER_BUFFER_W;
array_insert(b, b->keeps, stgb);
array_insert(ctx->block, ctx->block->keeps, stgb);
}
static struct ir3_instruction *
emit_atomic(struct ir3_block *b,
emit_atomic(struct ir3_builder *b,
nir_atomic_op op,
struct ir3_instruction *bo,
struct ir3_instruction *data,
@ -167,7 +167,7 @@ emit_atomic(struct ir3_block *b,
static struct ir3_instruction *
emit_intrinsic_atomic_ssbo(struct ir3_context *ctx, nir_intrinsic_instr *intr)
{
struct ir3_block *b = ctx->block;
struct ir3_builder *b = &ctx->build;
nir_atomic_op op = nir_intrinsic_atomic_op(intr);
type_t type = nir_atomic_op_type(op) == nir_type_int ? TYPE_S32 : TYPE_U32;
@ -196,7 +196,7 @@ emit_intrinsic_atomic_ssbo(struct ir3_context *ctx, nir_intrinsic_instr *intr)
atomic->barrier_conflict = IR3_BARRIER_BUFFER_R | IR3_BARRIER_BUFFER_W;
/* even if nothing consume the result, we can't DCE the instruction: */
array_insert(b, b->keeps, atomic);
array_insert(ctx->block, ctx->block->keeps, atomic);
return atomic;
}
@ -205,7 +205,7 @@ static struct ir3_instruction *
get_image_offset(struct ir3_context *ctx, const nir_intrinsic_instr *instr,
struct ir3_instruction *const *coords, bool byteoff)
{
struct ir3_block *b = ctx->block;
struct ir3_builder *b = &ctx->build;
struct ir3_instruction *offset;
unsigned index = nir_src_as_uint(instr->src[0]);
unsigned ncoords = ir3_get_image_coords(instr, NULL);
@ -264,7 +264,7 @@ static void
emit_intrinsic_load_image(struct ir3_context *ctx, nir_intrinsic_instr *intr,
struct ir3_instruction **dst)
{
struct ir3_block *b = ctx->block;
struct ir3_builder *b = &ctx->build;
struct ir3_instruction *const *coords = ir3_get_src(ctx, &intr->src[1]);
struct ir3_instruction *ibo = ir3_image_to_ibo(ctx, intr->src[0]);
struct ir3_instruction *offset = get_image_offset(ctx, intr, coords, true);
@ -311,7 +311,7 @@ emit_intrinsic_load_image(struct ir3_context *ctx, nir_intrinsic_instr *intr,
static void
emit_intrinsic_store_image(struct ir3_context *ctx, nir_intrinsic_instr *intr)
{
struct ir3_block *b = ctx->block;
struct ir3_builder *b = &ctx->build;
struct ir3_instruction *stib, *offset;
struct ir3_instruction *const *value = ir3_get_src(ctx, &intr->src[3]);
struct ir3_instruction *const *coords = ir3_get_src(ctx, &intr->src[1]);
@ -341,14 +341,14 @@ emit_intrinsic_store_image(struct ir3_context *ctx, nir_intrinsic_instr *intr)
stib->barrier_class = IR3_BARRIER_IMAGE_W;
stib->barrier_conflict = IR3_BARRIER_IMAGE_R | IR3_BARRIER_IMAGE_W;
array_insert(b, b->keeps, stib);
array_insert(ctx->block, ctx->block->keeps, stib);
}
/* src[] = { deref, coord, sample_index, value, compare }. const_index[] = {} */
static struct ir3_instruction *
emit_intrinsic_atomic_image(struct ir3_context *ctx, nir_intrinsic_instr *intr)
{
struct ir3_block *b = ctx->block;
struct ir3_builder *b = &ctx->build;
struct ir3_instruction *atomic, *src0, *src1, *src2;
struct ir3_instruction *const *coords = ir3_get_src(ctx, &intr->src[1]);
struct ir3_instruction *image = ir3_image_to_ibo(ctx, intr->src[0]);
@ -375,7 +375,7 @@ emit_intrinsic_atomic_image(struct ir3_context *ctx, nir_intrinsic_instr *intr)
atomic->barrier_conflict = IR3_BARRIER_IMAGE_R | IR3_BARRIER_IMAGE_W;
/* even if nothing consume the result, we can't DCE the instruction: */
array_insert(b, b->keeps, atomic);
array_insert(ctx->block, ctx->block->keeps, atomic);
return atomic;
}

34
src/freedreno/ir3/ir3_a6xx.c
View file

@ -38,7 +38,7 @@ static void
emit_intrinsic_load_ssbo(struct ir3_context *ctx, nir_intrinsic_instr *intr,
struct ir3_instruction **dst)
{
struct ir3_block *b = ctx->block;
struct ir3_builder *b = &ctx->build;
struct ir3_instruction *offset;
struct ir3_instruction *ldib;
unsigned imm_offset_val;
@ -87,7 +87,7 @@ emit_intrinsic_load_ssbo(struct ir3_context *ctx, nir_intrinsic_instr *intr,
static void
emit_intrinsic_store_ssbo(struct ir3_context *ctx, nir_intrinsic_instr *intr)
{
struct ir3_block *b = ctx->block;
struct ir3_builder *b = &ctx->build;
struct ir3_instruction *stib, *val, *offset;
unsigned wrmask = nir_intrinsic_write_mask(intr);
unsigned ncomp = ffs(~wrmask) - 1;
@ -146,11 +146,11 @@ emit_intrinsic_store_ssbo(struct ir3_context *ctx, nir_intrinsic_instr *intr)
ir3_handle_bindless_cat6(stib, intr->src[1]);
ir3_handle_nonuniform(stib, intr);
array_insert(b, b->keeps, stib);
array_insert(ctx->block, ctx->block->keeps, stib);
}
static struct ir3_instruction *
emit_atomic(struct ir3_block *b,
emit_atomic(struct ir3_builder *b,
nir_atomic_op op,
struct ir3_instruction *ibo,
struct ir3_instruction *src0,
@ -202,7 +202,7 @@ emit_atomic(struct ir3_block *b,
static struct ir3_instruction *
emit_intrinsic_atomic_ssbo(struct ir3_context *ctx, nir_intrinsic_instr *intr)
{
struct ir3_block *b = ctx->block;
struct ir3_builder *b = &ctx->build;
struct ir3_instruction *atomic, *ibo, *src0, *src1, *data, *dummy;
nir_atomic_op op = nir_intrinsic_atomic_op(intr);
type_t type = nir_atomic_op_type(op) == nir_type_int ? TYPE_S32 : TYPE_U32;
@ -261,7 +261,7 @@ emit_intrinsic_atomic_ssbo(struct ir3_context *ctx, nir_intrinsic_instr *intr)
ir3_handle_bindless_cat6(atomic, intr->src[0]);
/* even if nothing consume the result, we can't DCE the instruction: */
array_insert(b, b->keeps, atomic);
array_insert(ctx->block, ctx->block->keeps, atomic);
atomic->dsts[0]->wrmask = src1->dsts[0]->wrmask;
ir3_reg_tie(atomic->dsts[0], atomic->srcs[2]);
@ -278,7 +278,7 @@ static void
emit_intrinsic_load_image(struct ir3_context *ctx, nir_intrinsic_instr *intr,
struct ir3_instruction **dst)
{
struct ir3_block *b = ctx->block;
struct ir3_builder *b = &ctx->build;
struct ir3_instruction *ldib;
struct ir3_instruction *const *coords = ir3_get_src(ctx, &intr->src[1]);
unsigned ncoords = ir3_get_image_coords(intr, NULL);
@ -303,7 +303,7 @@ emit_intrinsic_load_image(struct ir3_context *ctx, nir_intrinsic_instr *intr,
static void
emit_intrinsic_store_image(struct ir3_context *ctx, nir_intrinsic_instr *intr)
{
struct ir3_block *b = ctx->block;
struct ir3_builder *b = &ctx->build;
struct ir3_instruction *stib;
struct ir3_instruction *const *value = ir3_get_src(ctx, &intr->src[3]);
struct ir3_instruction *const *coords = ir3_get_src(ctx, &intr->src[1]);
@ -326,14 +326,14 @@ emit_intrinsic_store_image(struct ir3_context *ctx, nir_intrinsic_instr *intr)
ir3_handle_bindless_cat6(stib, intr->src[0]);
ir3_handle_nonuniform(stib, intr);
array_insert(b, b->keeps, stib);
array_insert(ctx->block, ctx->block->keeps, stib);
}
/* src[] = { deref, coord, sample_index, value, compare }. const_index[] = {} */
static struct ir3_instruction *
emit_intrinsic_atomic_image(struct ir3_context *ctx, nir_intrinsic_instr *intr)
{
struct ir3_block *b = ctx->block;
struct ir3_builder *b = &ctx->build;
struct ir3_instruction *atomic, *ibo, *src0, *src1, *dummy;
struct ir3_instruction *const *coords = ir3_get_src(ctx, &intr->src[1]);
struct ir3_instruction *value = ir3_get_src(ctx, &intr->src[3])[0];
@ -374,7 +374,7 @@ emit_intrinsic_atomic_image(struct ir3_context *ctx, nir_intrinsic_instr *intr)
ir3_handle_bindless_cat6(atomic, intr->src[0]);
/* even if nothing consume the result, we can't DCE the instruction: */
array_insert(b, b->keeps, atomic);
array_insert(ctx->block, ctx->block->keeps, atomic);
atomic->dsts[0]->wrmask = src1->dsts[0]->wrmask;
ir3_reg_tie(atomic->dsts[0], atomic->srcs[2]);
@ -388,7 +388,7 @@ static void
emit_intrinsic_image_size(struct ir3_context *ctx, nir_intrinsic_instr *intr,
struct ir3_instruction **dst)
{
struct ir3_block *b = ctx->block;
struct ir3_builder *b = &ctx->build;
struct ir3_instruction *ibo = ir3_image_to_ibo(ctx, intr->src[0]);
struct ir3_instruction *resinfo = ir3_RESINFO(b, ibo, 0);
resinfo->cat6.iim_val = 1;
@ -409,7 +409,7 @@ emit_intrinsic_load_global_ir3(struct ir3_context *ctx,
nir_intrinsic_instr *intr,
struct ir3_instruction **dst)
{
struct ir3_block *b = ctx->block;
struct ir3_builder *b = &ctx->build;
unsigned dest_components = nir_intrinsic_dest_components(intr);
struct ir3_instruction *addr, *offset;
@ -452,7 +452,7 @@ static void
emit_intrinsic_store_global_ir3(struct ir3_context *ctx,
nir_intrinsic_instr *intr)
{
struct ir3_block *b = ctx->block;
struct ir3_builder *b = &ctx->build;
struct ir3_instruction *value, *addr, *offset;
unsigned ncomp = nir_intrinsic_src_components(intr, 0);
@ -486,7 +486,7 @@ emit_intrinsic_store_global_ir3(struct ir3_context *ctx,
stg->cat6.type = type_uint_size(intr->src[0].ssa->bit_size);
stg->cat6.iim_val = 1;
array_insert(b, b->keeps, stg);
array_insert(ctx->block, ctx->block->keeps, stg);
stg->barrier_class = IR3_BARRIER_BUFFER_W;
stg->barrier_conflict = IR3_BARRIER_BUFFER_R | IR3_BARRIER_BUFFER_W;
@ -495,7 +495,7 @@ emit_intrinsic_store_global_ir3(struct ir3_context *ctx,
static struct ir3_instruction *
emit_intrinsic_atomic_global(struct ir3_context *ctx, nir_intrinsic_instr *intr)
{
struct ir3_block *b = ctx->block;
struct ir3_builder *b = &ctx->build;
struct ir3_instruction *addr, *atomic, *src1;
struct ir3_instruction *value = ir3_get_src(ctx, &intr->src[1])[0];
nir_atomic_op op = nir_intrinsic_atomic_op(intr);
@ -571,7 +571,7 @@ emit_intrinsic_atomic_global(struct ir3_context *ctx, nir_intrinsic_instr *intr)
atomic->dsts[0]->wrmask = MASK(intr->def.bit_size == 64 ? 2 : 1);
/* even if nothing consume the result, we can't DCE the instruction: */
array_insert(b, b->keeps, atomic);
array_insert(ctx->block, ctx->block->keeps, atomic);
return atomic;
}

4
src/freedreno/ir3/ir3_array_to_ssa.c
View file

@ -86,9 +86,7 @@ read_value_beginning(struct array_ctx *ctx, struct ir3_block *block,
unsigned flags = IR3_REG_ARRAY | (arr->half ? IR3_REG_HALF : 0);
struct ir3_instruction *phi =
ir3_instr_create(block, OPC_META_PHI, 1, block->predecessors_count);
list_del(&phi->node);
list_add(&phi->node, &block->instr_list);
ir3_instr_create_at(ir3_before_block(block), OPC_META_PHI, 1, block->predecessors_count);
struct ir3_register *dst = __ssa_dst(phi);
dst->flags |= flags;

393
src/freedreno/ir3/ir3_compiler_nir.c
View file

File diff suppressed because it is too large Load diff

64
src/freedreno/ir3/ir3_context.c
View file

@ -244,11 +244,11 @@ ir3_get_src_maybe_shared(struct ir3_context *ctx, nir_src *src)
}
static struct ir3_instruction *
get_shared(struct ir3_block *block, struct ir3_instruction *src, bool shared)
get_shared(struct ir3_builder *build, struct ir3_instruction *src, bool shared)
{
if (!!(src->dsts[0]->flags & IR3_REG_SHARED) != shared) {
struct ir3_instruction *mov =
ir3_MOV(block, src, (src->dsts[0]->flags & IR3_REG_HALF) ? TYPE_U16 : TYPE_U32);
ir3_MOV(build, src, (src->dsts[0]->flags & IR3_REG_HALF) ? TYPE_U16 : TYPE_U32);
mov->dsts[0]->flags &= ~IR3_REG_SHARED;
mov->dsts[0]->flags |= COND(shared, IR3_REG_SHARED);
return mov;
@ -276,7 +276,7 @@ ir3_get_src_shared(struct ir3_context *ctx, nir_src *src, bool shared)
struct ir3_instruction **new_value =
ralloc_array(ctx, struct ir3_instruction *, num_components);
for (unsigned i = 0; i < num_components; i++)
new_value[i] = get_shared(ctx->block, value[i], shared);
new_value[i] = get_shared(&ctx->build, value[i], shared);
return new_value;
}
@ -310,7 +310,7 @@ dest_flags(struct ir3_instruction *instr)
}
struct ir3_instruction *
ir3_create_collect(struct ir3_block *block, struct ir3_instruction *const *arr,
ir3_create_collect(struct ir3_builder *build, struct ir3_instruction *const *arr,
unsigned arrsz)
{
struct ir3_instruction *collect;
@ -323,7 +323,7 @@ ir3_create_collect(struct ir3_block *block, struct ir3_instruction *const *arr,
unsigned flags = dest_flags(arr[0]);
collect = ir3_instr_create(block, OPC_META_COLLECT, 1, arrsz);
collect = ir3_build_instr(build, OPC_META_COLLECT, 1, arrsz);
__ssa_dst(collect)->flags |= flags;
for (unsigned i = 0; i < arrsz; i++) {
struct ir3_instruction *elem = arr[i];
@ -354,7 +354,7 @@ ir3_create_collect(struct ir3_block *block, struct ir3_instruction *const *arr,
*/
if (elem->dsts[0]->flags & IR3_REG_ARRAY) {
type_t type = (flags & IR3_REG_HALF) ? TYPE_U16 : TYPE_U32;
elem = ir3_MOV(block, elem, type);
elem = ir3_MOV(build, elem, type);
}
assert(dest_flags(elem) == flags);
@ -370,7 +370,7 @@ ir3_create_collect(struct ir3_block *block, struct ir3_instruction *const *arr,
* outputs which need to have a split meta instruction inserted
*/
void
ir3_split_dest(struct ir3_block *block, struct ir3_instruction **dst,
ir3_split_dest(struct ir3_builder *build, struct ir3_instruction **dst,
struct ir3_instruction *src, unsigned base, unsigned n)
{
if ((n == 1) && (src->dsts[0]->wrmask == 0x1) &&
@ -394,7 +394,7 @@ ir3_split_dest(struct ir3_block *block, struct ir3_instruction **dst,
for (int i = 0, j = 0; i < n; i++) {
struct ir3_instruction *split =
ir3_instr_create(block, OPC_META_SPLIT, 1, 1);
ir3_build_instr(build, OPC_META_SPLIT, 1, 1);
__ssa_dst(split)->flags |= flags;
__ssa_src(split, src, flags);
split->split.off = i + base;
@ -426,11 +426,11 @@ ir3_context_error(struct ir3_context *ctx, const char *format, ...)
}
static struct ir3_instruction *
create_addr0(struct ir3_block *block, struct ir3_instruction *src, int align)
create_addr0(struct ir3_builder *build, struct ir3_instruction *src, int align)
{
struct ir3_instruction *instr, *immed;
instr = ir3_COV(block, src, TYPE_U32, TYPE_S16);
instr = ir3_COV(build, src, TYPE_U32, TYPE_S16);
bool shared = (src->dsts[0]->flags & IR3_REG_SHARED);
switch (align) {
@ -439,18 +439,18 @@ create_addr0(struct ir3_block *block, struct ir3_instruction *src, int align)
break;
case 2:
/* src *= 2 => src <<= 1: */
immed = create_immed_typed_shared(block, 1, TYPE_S16, shared);
instr = ir3_SHL_B(block, instr, 0, immed, 0);
immed = create_immed_typed_shared(build, 1, TYPE_S16, shared);
instr = ir3_SHL_B(build, instr, 0, immed, 0);
break;
case 3:
/* src *= 3: */
immed = create_immed_typed_shared(block, 3, TYPE_S16, shared);
instr = ir3_MULL_U(block, instr, 0, immed, 0);
immed = create_immed_typed_shared(build, 3, TYPE_S16, shared);
instr = ir3_MULL_U(build, instr, 0, immed, 0);
break;
case 4:
/* src *= 4 => src <<= 2: */
immed = create_immed_typed_shared(block, 2, TYPE_S16, shared);
instr = ir3_SHL_B(block, instr, 0, immed, 0);
immed = create_immed_typed_shared(build, 2, TYPE_S16, shared);
instr = ir3_SHL_B(build, instr, 0, immed, 0);
break;
default:
unreachable("bad align");
@ -459,7 +459,7 @@ create_addr0(struct ir3_block *block, struct ir3_instruction *src, int align)
instr->dsts[0]->flags |= IR3_REG_HALF;
instr = ir3_MOV(block, instr, TYPE_S16);
instr = ir3_MOV(build, instr, TYPE_S16);
instr->dsts[0]->num = regid(REG_A0, 0);
instr->dsts[0]->flags &= ~IR3_REG_SHARED;
@ -467,11 +467,11 @@ create_addr0(struct ir3_block *block, struct ir3_instruction *src, int align)
}
static struct ir3_instruction *
create_addr1(struct ir3_block *block, unsigned const_val)
create_addr1(struct ir3_builder *build, unsigned const_val)
{
struct ir3_instruction *immed =
create_immed_typed(block, const_val, TYPE_U16);
struct ir3_instruction *instr = ir3_MOV(block, immed, TYPE_U16);
create_immed_typed(build, const_val, TYPE_U16);
struct ir3_instruction *instr = ir3_MOV(build, immed, TYPE_U16);
instr->dsts[0]->num = regid(REG_A0, 1);
return instr;
}
@ -497,7 +497,7 @@ ir3_get_addr0(struct ir3_context *ctx, struct ir3_instruction *src, int align)
return entry->data;
}
addr = create_addr0(ctx->block, src, align);
addr = create_addr0(&ctx->build, src, align);
_mesa_hash_table_insert(ctx->addr0_ht[idx], src, addr);
return addr;
@ -517,7 +517,7 @@ ir3_get_addr1(struct ir3_context *ctx, unsigned const_val)
return addr;
}
addr = create_addr1(ctx->block, const_val);
addr = create_addr1(&ctx->build, const_val);
_mesa_hash_table_u64_insert(ctx->addr1_ht, const_val, addr);
return addr;
@ -533,28 +533,20 @@ ir3_get_predicate(struct ir3_context *ctx, struct ir3_instruction *src)
if (src_entry)
return src_entry->data;
struct ir3_block *b = src->block;
struct ir3_builder b = ir3_builder_at(ir3_after_instr_and_phis(src));
struct ir3_instruction *cond;
/* NOTE: we use cpms.s.ne x, 0 to move x into a predicate register */
struct ir3_instruction *zero =
create_immed_typed_shared(b, 0, is_half(src) ? TYPE_U16 : TYPE_U32,
create_immed_typed_shared(&b, 0, is_half(src) ? TYPE_U16 : TYPE_U32,
src->dsts[0]->flags & IR3_REG_SHARED);
cond = ir3_CMPS_S(b, src, 0, zero, 0);
cond = ir3_CMPS_S(&b, src, 0, zero, 0);
cond->cat2.condition = IR3_COND_NE;
/* condition always goes in predicate register: */
cond->dsts[0]->flags |= IR3_REG_PREDICATE;
cond->dsts[0]->flags &= ~IR3_REG_SHARED;
/* phi's should stay first in a block */
if (src->opc == OPC_META_PHI)
ir3_instr_move_after(zero, ir3_block_get_last_phi(src->block));
else
ir3_instr_move_after(zero, src);
ir3_instr_move_after(cond, zero);
_mesa_hash_table_insert(ctx->predicate_conversions, src, cond);
return cond;
}
@ -605,7 +597,7 @@ ir3_create_array_load(struct ir3_context *ctx, struct ir3_array *arr, int n,
struct ir3_register *src;
unsigned flags = 0;
mov = ir3_instr_create(block, OPC_MOV, 1, 1);
mov = ir3_build_instr(&ctx->build, OPC_MOV, 1, 1);
if (arr->half) {
mov->cat1.src_type = TYPE_U16;
mov->cat1.dst_type = TYPE_U16;
@ -645,7 +637,7 @@ ir3_create_array_store(struct ir3_context *ctx, struct ir3_array *arr, int n,
struct ir3_register *dst;
unsigned flags = 0;
mov = ir3_instr_create(block, OPC_MOV, 1, 1);
mov = ir3_build_instr(&ctx->build, OPC_MOV, 1, 1);
if (arr->half) {
mov->cat1.src_type = TYPE_U16;
mov->cat1.dst_type = TYPE_U16;
@ -700,7 +692,7 @@ ir3_lower_imm_offset(struct ir3_context *ctx, nir_intrinsic_instr *intr,
*/
uint32_t full_offset = base + nir_const_offset->u32;
*offset =
create_immed(ctx->block, ROUND_DOWN_TO(full_offset, imm_offset_bound));
create_immed(&ctx->build, ROUND_DOWN_TO(full_offset, imm_offset_bound));
*imm_offset = full_offset % imm_offset_bound;
} else {
*offset = ir3_get_src(ctx, offset_src)[0];

16
src/freedreno/ir3/ir3_context.h
View file

@ -48,6 +48,7 @@ struct ir3_context {
struct ir3_instruction **outputs;
struct ir3_block *block; /* the current block */
struct ir3_builder build;
struct ir3_block *in_block; /* block created for shader inputs */
nir_function_impl *impl;
@ -181,6 +182,13 @@ struct ir3_context *ir3_context_init(struct ir3_compiler *compiler,
struct ir3_shader_variant *so);
void ir3_context_free(struct ir3_context *ctx);
static inline void
ir3_context_set_block(struct ir3_context *ctx, struct ir3_block *block)
{
ctx->block = block;
ctx->build = ir3_builder_at(ir3_before_terminator(block));
}
struct ir3_instruction **ir3_get_dst_ssa(struct ir3_context *ctx,
nir_def *dst, unsigned n);
struct ir3_instruction **ir3_get_def(struct ir3_context *ctx, nir_def *def,
@ -197,10 +205,10 @@ ir3_get_src(struct ir3_context *ctx, nir_src *src)
}
void ir3_put_def(struct ir3_context *ctx, nir_def *def);
struct ir3_instruction *ir3_create_collect(struct ir3_block *block,
struct ir3_instruction *ir3_create_collect(struct ir3_builder *build,
struct ir3_instruction *const *arr,
unsigned arrsz);
void ir3_split_dest(struct ir3_block *block, struct ir3_instruction **dst,
void ir3_split_dest(struct ir3_builder *build, struct ir3_instruction **dst,
struct ir3_instruction *src, unsigned base, unsigned n);
void ir3_handle_bindless_cat6(struct ir3_instruction *instr, nir_src rsrc);
void ir3_handle_nonuniform(struct ir3_instruction *instr,
@ -209,10 +217,10 @@ void emit_intrinsic_image_size_tex(struct ir3_context *ctx,
nir_intrinsic_instr *intr,
struct ir3_instruction **dst);
#define ir3_collect(block, ...) \
#define ir3_collect(build, ...) \
({ \
struct ir3_instruction *__arr[] = {__VA_ARGS__}; \
ir3_create_collect(block, __arr, ARRAY_SIZE(__arr)); \
ir3_create_collect(build, __arr, ARRAY_SIZE(__arr)); \
})
NORETURN void ir3_context_error(struct ir3_context *ctx, const char *format,

6
src/freedreno/ir3/ir3_image.c
View file

@ -49,13 +49,13 @@ ir3_image_to_ibo(struct ir3_context *ctx, nir_src src)
if (nir_src_is_const(src)) {
int image_idx = nir_src_as_uint(src);
return create_immed(ctx->block, ctx->s->info.num_ssbos + image_idx);
return create_immed(&ctx->build, ctx->s->info.num_ssbos + image_idx);
} else {
struct ir3_instruction *image_idx = ir3_get_src(ctx, &src)[0];
if (ctx->s->info.num_ssbos) {
return ir3_ADD_U(ctx->block,
return ir3_ADD_U(&ctx->build,
image_idx, 0,
create_immed(ctx->block, ctx->s->info.num_ssbos), 0);
create_immed(&ctx->build, ctx->s->info.num_ssbos), 0);
} else {
return image_idx;
}

54
src/freedreno/ir3/ir3_legalize.c
View file

@ -330,6 +330,7 @@ legalize_block(struct ir3_legalize_ctx *ctx, struct ir3_block *block)
struct ir3_legalize_state *state = &bd->begin_state;
bool last_input_needs_ss = false;
bool mergedregs = ctx->so->mergedregs;
struct ir3_builder build = ir3_builder_at(ir3_after_block(block));
/* Our input state is the OR of all predecessor blocks' state.
*
@ -541,7 +542,7 @@ legalize_block(struct ir3_legalize_ctx *ctx, struct ir3_block *block)
*/
if ((n->flags & IR3_INSTR_SS) && (opc_cat(n->opc) >= 5)) {
struct ir3_instruction *nop;
nop = ir3_NOP(block);
nop = ir3_NOP(&build);
nop->flags |= IR3_INSTR_SS;
n->flags &= ~IR3_INSTR_SS;
last_n = nop;
@ -576,7 +577,7 @@ legalize_block(struct ir3_legalize_ctx *ctx, struct ir3_block *block)
if (delay > 0) {
assert(delay <= 6);
ir3_NOP(block)->repeat = delay - 1;
ir3_NOP(&build)->repeat = delay - 1;
cycle += delay;
}
@ -622,7 +623,7 @@ legalize_block(struct ir3_legalize_ctx *ctx, struct ir3_block *block)
ctx->has_tex_prefetch = true;
} else if (n->opc == OPC_RESINFO && n->dsts_count > 0) {
regmask_set(&state->needs_ss, n->dsts[0]);
ir3_NOP(block)->flags |= IR3_INSTR_SS;
ir3_NOP(&build)->flags |= IR3_INSTR_SS;
last_input_needs_ss = false;
} else if (is_load(n)) {
if (is_local_mem_load(n))
@ -717,7 +718,7 @@ legalize_block(struct ir3_legalize_ctx *ctx, struct ir3_block *block)
struct ir3_instruction *baryf;
/* (ss)bary.f (ei)r63.x, 0, r0.x */
baryf = ir3_instr_create(block, OPC_BARY_F, 1, 2);
baryf = ir3_build_instr(&build, OPC_BARY_F, 1, 2);
ir3_dst_create(baryf, regid(63, 0), 0);
ir3_src_create(baryf, 0, IR3_REG_IMMED)->iim_val = 0;
ir3_src_create(baryf, regid(0, 0), 0);
@ -746,7 +747,7 @@ legalize_block(struct ir3_legalize_ctx *ctx, struct ir3_block *block)
struct ir3_instruction *baryf;
/* (ss)bary.f (ei)r63.x, 0, r0.x */
baryf = ir3_instr_create(block, OPC_BARY_F, 1, 2);
baryf = ir3_build_instr(&build, OPC_BARY_F, 1, 2);
ir3_dst_create(baryf, regid(63, 0), 0)->flags |= IR3_REG_EI;
ir3_src_create(baryf, 0, IR3_REG_IMMED)->iim_val = 0;
ir3_src_create(baryf, regid(0, 0), 0);
@ -851,8 +852,7 @@ apply_push_consts_load_macro(struct ir3_legalize_ctx *ctx,
{
foreach_instr (n, &block->instr_list) {
if (n->opc == OPC_PUSH_CONSTS_LOAD_MACRO) {
struct ir3_instruction *stsc = ir3_instr_create(block, OPC_STSC, 0, 2);
ir3_instr_move_after(stsc, n);
struct ir3_instruction *stsc = ir3_instr_create_at(ir3_after_instr(n), OPC_STSC, 0, 2);
ir3_src_create(stsc, 0, IR3_REG_IMMED)->iim_val =
n->push_consts.dst_base;
ir3_src_create(stsc, 0, IR3_REG_IMMED)->iim_val =
@ -861,8 +861,8 @@ apply_push_consts_load_macro(struct ir3_legalize_ctx *ctx,
stsc->cat6.type = TYPE_U32;
if (ctx->compiler->stsc_duplication_quirk) {
struct ir3_instruction *nop = ir3_NOP(block);
ir3_instr_move_after(nop, stsc);
struct ir3_builder build = ir3_builder_at(ir3_after_instr(stsc));
struct ir3_instruction *nop = ir3_NOP(&build);
nop->flags |= IR3_INSTR_SS;
ir3_instr_move_after(ir3_instr_clone(stsc), nop);
}
@ -1171,7 +1171,8 @@ block_sched(struct ir3 *ir)
br1 = terminator;
br1->cat0.target = block->successors[1];
br2 = ir3_JUMP(block);
struct ir3_builder build = ir3_builder_at(ir3_after_block(block));
br2 = ir3_JUMP(&build);
br2->cat0.target = block->successors[0];
} else if (opc == OPC_BR || opc == OPC_BRAA || opc == OPC_BRAO ||
opc == OPC_BALL || opc == OPC_BANY) {
@ -1219,13 +1220,15 @@ add_predication_workaround(struct ir3_compiler *compiler,
struct ir3_instruction *prede)
{
if (predtf && compiler->predtf_nop_quirk) {
struct ir3_instruction *nop = ir3_NOP(predtf->block);
struct ir3_builder build = ir3_builder_at(ir3_after_block(predtf->block));
struct ir3_instruction *nop = ir3_NOP(&build);
nop->repeat = 4;
ir3_instr_move_after(nop, predtf);
}
if (compiler->prede_nop_quirk) {
struct ir3_instruction *nop = ir3_NOP(prede->block);
struct ir3_builder build = ir3_builder_at(ir3_after_block(prede->block));
struct ir3_instruction *nop = ir3_NOP(&build);
nop->repeat = 6;
ir3_instr_move_after(nop, prede);
}
@ -1300,7 +1303,9 @@ prede_sched(struct ir3 *ir)
* |----------|
*/
if (!list_is_empty(&succ1->instr_list)) {
struct ir3_instruction *prede = ir3_PREDE(succ1);
struct ir3_builder build =
ir3_builder_at(ir3_before_terminator(succ1));
struct ir3_instruction *prede = ir3_PREDE(&build);
add_predication_workaround(ir->compiler, succ0_terminator, prede);
continue;
}
@ -1321,7 +1326,8 @@ prede_sched(struct ir3 *ir)
* |----------|
*/
list_delinit(&succ0_terminator->node);
struct ir3_instruction *prede = ir3_PREDE(succ0);
struct ir3_builder build = ir3_builder_at(ir3_before_terminator(succ0));
struct ir3_instruction *prede = ir3_PREDE(&build);
add_predication_workaround(ir->compiler, NULL, prede);
remove_unused_block(succ1);
block->successors[1] = succ0->successors[0];
@ -1372,15 +1378,12 @@ kill_sched(struct ir3 *ir, struct ir3_shader_variant *so)
if (instr->opc != OPC_KILL)
continue;
struct ir3_instruction *br = ir3_instr_create(block, OPC_BR, 0, 1);
struct ir3_instruction *br = ir3_instr_create_at(ir3_after_instr(instr), OPC_BR, 0, 1);
ir3_src_create(br, instr->srcs[0]->num, instr->srcs[0]->flags)->wrmask =
1;
br->cat0.target =
list_last_entry(&ir->block_list, struct ir3_block, node);
list_del(&br->node);
list_add(&br->node, &instr->node);
added = true;
}
}
@ -1405,9 +1408,9 @@ dbg_sync_sched(struct ir3 *ir, struct ir3_shader_variant *so)
foreach_block (block, &ir->block_list) {
foreach_instr_safe (instr, &block->instr_list) {
if (is_ss_producer(instr) || is_sy_producer(instr)) {
struct ir3_instruction *nop = ir3_NOP(block);
struct ir3_builder build = ir3_builder_at(ir3_after_instr(instr));
struct ir3_instruction *nop = ir3_NOP(&build);
nop->flags |= IR3_INSTR_SS | IR3_INSTR_SY;
ir3_instr_move_after(nop, instr);
}
}
}
@ -1418,9 +1421,9 @@ dbg_nop_sched(struct ir3 *ir, struct ir3_shader_variant *so)
{
foreach_block (block, &ir->block_list) {
foreach_instr_safe (instr, &block->instr_list) {
struct ir3_instruction *nop = ir3_NOP(block);
struct ir3_builder build = ir3_builder_at(ir3_before_instr(instr));
struct ir3_instruction *nop = ir3_NOP(&build);
nop->repeat = 5;
ir3_instr_move_before(nop, instr);
}
}
}
@ -1669,10 +1672,11 @@ helper_sched(struct ir3_legalize_ctx *ctx, struct ir3 *ir,
*/
if (!killed && (expensive_instruction_in_block ||
block->successors[0] != ir3_end_block(ir))) {
struct ir3_instruction *nop = ir3_NOP(block);
struct ir3_cursor cursor = first_instr ? ir3_before_instr(first_instr)
: ir3_before_terminator(block);
struct ir3_builder build = ir3_builder_at(cursor);
struct ir3_instruction *nop = ir3_NOP(&build);
nop->flags |= IR3_INSTR_EQ;
if (first_instr)
ir3_instr_move_before(nop, first_instr);
}
}
}

31
src/freedreno/ir3/ir3_lower_parallelcopy.c
View file

@ -55,12 +55,10 @@ do_xor(struct ir3_instruction *instr, unsigned dst_num, unsigned src1_num,
unsigned src2_num, unsigned flags)
{
struct ir3_instruction * xor
= ir3_instr_create(instr->block, OPC_XOR_B, 1, 2);
= ir3_instr_create_at(ir3_before_instr(instr), OPC_XOR_B, 1, 2);
ir3_dst_create(xor, dst_num, flags);
ir3_src_create(xor, src1_num, flags);
ir3_src_create(xor, src2_num, flags);
ir3_instr_move_before(xor, instr);
}
static void
@ -144,7 +142,7 @@ do_swap(struct ir3_compiler *compiler, struct ir3_instruction *instr,
do_xor(instr, src_num, src_num, dst_num, entry->flags);
do_xor(instr, dst_num, dst_num, src_num, entry->flags);
} else {
struct ir3_instruction *swz = ir3_instr_create(instr->block, OPC_SWZ, 2, 2);
struct ir3_instruction *swz = ir3_instr_create_at(ir3_before_instr(instr), OPC_SWZ, 2, 2);
ir3_dst_create(swz, dst_num, entry->flags);
ir3_dst_create(swz, src_num, entry->flags);
ir3_src_create(swz, src_num, entry->flags);
@ -152,7 +150,6 @@ do_swap(struct ir3_compiler *compiler, struct ir3_instruction *instr,
swz->cat1.dst_type = (entry->flags & IR3_REG_HALF) ? TYPE_U16 : TYPE_U32;
swz->cat1.src_type = (entry->flags & IR3_REG_HALF) ? TYPE_U16 : TYPE_U32;
swz->repeat = 1;
ir3_instr_move_before(swz, instr);
}
}
@ -206,20 +203,18 @@ do_copy(struct ir3_compiler *compiler, struct ir3_instruction *instr,
if (entry->src.reg % 2 == 0) {
/* cov.u32u16 dst, src */
struct ir3_instruction *cov =
ir3_instr_create(instr->block, OPC_MOV, 1, 1);
ir3_instr_create_at(ir3_before_instr(instr), OPC_MOV, 1, 1);
ir3_dst_create(cov, dst_num, entry->flags);
ir3_src_create(cov, src_num, entry->flags & ~IR3_REG_HALF);
cov->cat1.dst_type = TYPE_U16;
cov->cat1.src_type = TYPE_U32;
ir3_instr_move_before(cov, instr);
} else {
/* shr.b dst, src, (16) */
struct ir3_instruction *shr =
ir3_instr_create(instr->block, OPC_SHR_B, 1, 2);
ir3_instr_create_at(ir3_before_instr(instr), OPC_SHR_B, 1, 2);
ir3_dst_create(shr, dst_num, entry->flags);
ir3_src_create(shr, src_num, entry->flags & ~IR3_REG_HALF);
ir3_src_create(shr, 0, IR3_REG_IMMED)->uim_val = 16;
ir3_instr_move_before(shr, instr);
}
return;
}
@ -228,7 +223,7 @@ do_copy(struct ir3_compiler *compiler, struct ir3_instruction *instr,
unsigned src_num = ra_physreg_to_num(entry->src.reg, entry->flags);
unsigned dst_num = ra_physreg_to_num(entry->dst, entry->flags);
struct ir3_instruction *mov = ir3_instr_create(instr->block, OPC_MOV, 1, 1);
struct ir3_instruction *mov = ir3_instr_create_at(ir3_before_instr(instr), OPC_MOV, 1, 1);
ir3_dst_create(mov, dst_num, entry->flags);
if (entry->src.flags & (IR3_REG_IMMED | IR3_REG_CONST))
ir3_src_create(mov, INVALID_REG, (entry->flags & IR3_REG_HALF) | entry->src.flags);
@ -240,7 +235,6 @@ do_copy(struct ir3_compiler *compiler, struct ir3_instruction *instr,
mov->srcs[0]->uim_val = entry->src.imm;
else if (entry->src.flags & IR3_REG_CONST)
mov->srcs[0]->num = entry->src.const_num;
ir3_instr_move_before(mov, instr);
}
struct copy_ctx {
@ -570,7 +564,10 @@ ir3_lower_copies(struct ir3_shader_variant *v)
src_num++, dst_num++) {
if (src_num & 1) {
for (unsigned i = 0; i < 2; i++) {
struct ir3_instruction *swz = ir3_instr_create(instr->block, OPC_SWZ, 2, 2);
struct ir3_cursor cursor = i == 0
? ir3_before_instr(instr)
: ir3_after_instr(instr);
struct ir3_instruction *swz = ir3_instr_create_at(cursor, OPC_SWZ, 2, 2);
ir3_dst_create(swz, src_num - 1, IR3_REG_HALF);
ir3_dst_create(swz, src_num, IR3_REG_HALF);
ir3_src_create(swz, src_num, IR3_REG_HALF);
@ -578,15 +575,11 @@ ir3_lower_copies(struct ir3_shader_variant *v)
swz->cat1.dst_type = TYPE_U16;
swz->cat1.src_type = TYPE_U16;
swz->repeat = 1;
if (i == 0)
ir3_instr_move_before(swz, instr);
else
ir3_instr_move_after(swz, instr);
}
}
struct ir3_instruction *mov =
ir3_instr_create(instr->block, OPC_MOV, 1, 1);
struct ir3_instruction *mov = ir3_instr_create_at(
ir3_before_instr(instr), OPC_MOV, 1, 1);
ir3_dst_create(mov, dst_num, instr->dsts[0]->flags);
ir3_src_create(mov, src_num / 2,
@ -600,8 +593,6 @@ ir3_lower_copies(struct ir3_shader_variant *v)
instr->cat1.src_type == TYPE_S16);
mov->cat1.src_type = TYPE_U32;
mov->cat1.dst_type = TYPE_U16;
ir3_instr_move_before(mov, instr);
}
list_del(&instr->node);

6
src/freedreno/ir3/ir3_lower_shared_phi.c
View file

@ -41,7 +41,7 @@ lower_phi(void *ctx, struct ir3_instruction *phi)
for (unsigned i = 0; i < block->predecessors_count; i++) {
struct ir3_block *pred = block->predecessors[i];
if (phi->srcs[i]->def) {
struct ir3_instruction *pred_mov = ir3_instr_create(pred, OPC_MOV, 1, 1);
struct ir3_instruction *pred_mov = ir3_instr_create_at(ir3_before_terminator(pred), OPC_MOV, 1, 1);
pred_mov->uses = _mesa_pointer_set_create(ctx);
__ssa_dst(pred_mov)->flags |= (phi->srcs[i]->flags & IR3_REG_HALF);
unsigned src_flags = IR3_REG_SSA | IR3_REG_SHARED |
@ -60,12 +60,12 @@ lower_phi(void *ctx, struct ir3_instruction *phi)
phi->dsts[0]->flags &= ~IR3_REG_SHARED;
struct ir3_builder build = ir3_builder_at(ir3_after_phis(block));
struct ir3_instruction *shared_mov =
ir3_MOV(block, phi,
ir3_MOV(&build, phi,
(phi->dsts[0]->flags & IR3_REG_HALF) ? TYPE_U16 : TYPE_U32);
shared_mov->uses = _mesa_pointer_set_create(ctx);
shared_mov->dsts[0]->flags |= IR3_REG_SHARED;
ir3_instr_move_after_phis(shared_mov, block);
foreach_ssa_use (use, phi) {
for (unsigned i = 0; i < use->srcs_count; i++) {

8
src/freedreno/ir3/ir3_lower_spill.c
View file

@ -36,12 +36,10 @@ component_bytes(struct ir3_register *src)
static void
set_base_reg(struct ir3_instruction *mem, unsigned val)
{
struct ir3_instruction *mov = ir3_instr_create(mem->block, OPC_MOV, 1, 1);
struct ir3_instruction *mov = ir3_instr_create_at(ir3_before_instr(mem), OPC_MOV, 1, 1);
ir3_dst_create(mov, mem->srcs[0]->num, mem->srcs[0]->flags);
ir3_src_create(mov, INVALID_REG, IR3_REG_IMMED)->uim_val = val;
mov->cat1.dst_type = mov->cat1.src_type = TYPE_U32;
ir3_instr_move_before(mov, mem);
}
static void
@ -55,12 +53,10 @@ reset_base_reg(struct ir3_instruction *mem)
if (base->flags & IR3_REG_KILL)
return;
struct ir3_instruction *mov = ir3_instr_create(mem->block, OPC_MOV, 1, 1);
struct ir3_instruction *mov = ir3_instr_create_at(ir3_after_instr(mem), OPC_MOV, 1, 1);
ir3_dst_create(mov, base->num, base->flags);
ir3_src_create(mov, INVALID_REG, IR3_REG_IMMED)->uim_val = 0;
mov->cat1.dst_type = mov->cat1.src_type = TYPE_U32;
ir3_instr_move_after(mov, mem);
}
/* There are 13 bits, but 1 << 12 will be sign-extended into a negative offset

17
src/freedreno/ir3/ir3_lower_subgroups.c
View file

@ -44,7 +44,7 @@ replace_physical_pred(struct ir3_block *block, struct ir3_block *old_pred,
static void
mov_immed(struct ir3_register *dst, struct ir3_block *block, unsigned immed)
{
struct ir3_instruction *mov = ir3_instr_create(block, OPC_MOV, 1, 1);
struct ir3_instruction *mov = ir3_instr_create_at(ir3_before_terminator(block), OPC_MOV, 1, 1);
struct ir3_register *mov_dst = ir3_dst_create(mov, dst->num, dst->flags);
mov_dst->wrmask = dst->wrmask;
struct ir3_register *src = ir3_src_create(
@ -59,7 +59,7 @@ static void
mov_reg(struct ir3_block *block, struct ir3_register *dst,
struct ir3_register *src)
{
struct ir3_instruction *mov = ir3_instr_create(block, OPC_MOV, 1, 1);
struct ir3_instruction *mov = ir3_instr_create_at(ir3_before_terminator(block), OPC_MOV, 1, 1);
struct ir3_register *mov_dst =
ir3_dst_create(mov, dst->num, dst->flags & (IR3_REG_HALF | IR3_REG_SHARED));
@ -77,7 +77,7 @@ static void
binop(struct ir3_block *block, opc_t opc, struct ir3_register *dst,
struct ir3_register *src0, struct ir3_register *src1)
{
struct ir3_instruction *instr = ir3_instr_create(block, opc, 1, 2);
struct ir3_instruction *instr = ir3_instr_create_at(ir3_before_terminator(block), opc, 1, 2);
unsigned flags = dst->flags & IR3_REG_HALF;
struct ir3_register *instr_dst = ir3_dst_create(instr, dst->num, flags);
@ -95,7 +95,7 @@ triop(struct ir3_block *block, opc_t opc, struct ir3_register *dst,
struct ir3_register *src0, struct ir3_register *src1,
struct ir3_register *src2)
{
struct ir3_instruction *instr = ir3_instr_create(block, opc, 1, 3);
struct ir3_instruction *instr = ir3_instr_create_at(ir3_before_terminator(block), opc, 1, 3);
unsigned flags = dst->flags & IR3_REG_HALF;
struct ir3_register *instr_dst = ir3_dst_create(instr, dst->num, flags);
@ -201,7 +201,8 @@ link_blocks(struct ir3_block *pred, struct ir3_block *succ, unsigned index)
static void
link_blocks_jump(struct ir3_block *pred, struct ir3_block *succ)
{
ir3_JUMP(pred);
struct ir3_builder build = ir3_builder_at(ir3_after_block(pred));
ir3_JUMP(&build);
link_blocks(pred, succ, 0);
}
@ -211,7 +212,7 @@ link_blocks_branch(struct ir3_block *pred, struct ir3_block *target,
struct ir3_instruction *condition)
{
unsigned nsrc = condition ? 1 : 0;
struct ir3_instruction *branch = ir3_instr_create(pred, opc, 0, nsrc);
struct ir3_instruction *branch = ir3_instr_create_at(ir3_after_block(pred), opc, 0, nsrc);
branch->flags |= flags;
if (condition) {
@ -464,7 +465,7 @@ lower_instr(struct ir3 *ir, struct ir3_block **block, struct ir3_instruction *in
case OPC_BALLOT_MACRO: {
unsigned comp_count = util_last_bit(instr->dsts[0]->wrmask);
struct ir3_instruction *movmsk =
ir3_instr_create(then_block, OPC_MOVMSK, 1, 0);
ir3_instr_create_at(ir3_before_terminator(then_block), OPC_MOVMSK, 1, 0);
ir3_dst_create(movmsk, instr->dsts[0]->num, instr->dsts[0]->flags);
movmsk->repeat = comp_count - 1;
break;
@ -473,7 +474,7 @@ lower_instr(struct ir3 *ir, struct ir3_block **block, struct ir3_instruction *in
case OPC_READ_GETLAST_MACRO:
case OPC_READ_COND_MACRO: {
struct ir3_instruction *mov =
ir3_instr_create(then_block, OPC_MOV, 1, 1);
ir3_instr_create_at(ir3_before_terminator(then_block), OPC_MOV, 1, 1);
ir3_dst_create(mov, instr->dsts[0]->num, instr->dsts[0]->flags);
struct ir3_register *new_src = ir3_src_create(mov, 0, 0);
unsigned idx = instr->opc == OPC_READ_COND_MACRO ? 1 : 0;

2
src/freedreno/ir3/ir3_merge_regs.c
View file

@ -467,7 +467,7 @@ create_parallel_copy(struct ir3_block *block)
assert(j == phi_count);
struct ir3_instruction *pcopy =
ir3_instr_create(block, OPC_META_PARALLEL_COPY, phi_count, phi_count);
ir3_instr_create_at(ir3_before_terminator(block), OPC_META_PARALLEL_COPY, phi_count, phi_count);
for (j = 0; j < phi_count; j++) {
struct ir3_register *reg = __ssa_dst(pcopy);

8
src/freedreno/ir3/ir3_ra.c
View file

@ -1636,7 +1636,7 @@ insert_parallel_copy_instr(struct ra_ctx *ctx, struct ir3_instruction *instr)
return;
struct ir3_instruction *pcopy =
ir3_instr_create(instr->block, OPC_META_PARALLEL_COPY,
ir3_instr_create_at(ir3_before_instr(instr), OPC_META_PARALLEL_COPY,
ctx->parallel_copies_count, ctx->parallel_copies_count);
for (unsigned i = 0; i < ctx->parallel_copies_count; i++) {
@ -1661,8 +1661,6 @@ insert_parallel_copy_instr(struct ra_ctx *ctx, struct ir3_instruction *instr)
assign_reg(pcopy, reg, ra_physreg_to_num(entry->src, reg->flags));
}
list_del(&pcopy->node);
list_addtail(&pcopy->node, &instr->node);
ctx->parallel_copies_count = 0;
}
@ -2113,8 +2111,8 @@ insert_liveout_copy(struct ir3_block *block, physreg_t dst, physreg_t src,
old_pcopy = last;
unsigned old_pcopy_srcs = old_pcopy ? old_pcopy->srcs_count : 0;
struct ir3_instruction *pcopy = ir3_instr_create(
block, OPC_META_PARALLEL_COPY, old_pcopy_srcs + 1, old_pcopy_srcs + 1);
struct ir3_instruction *pcopy = ir3_instr_create_at(
ir3_before_terminator(block), OPC_META_PARALLEL_COPY, old_pcopy_srcs + 1, old_pcopy_srcs + 1);
for (unsigned i = 0; i < old_pcopy_srcs; i++) {
old_pcopy->dsts[i]->instr = pcopy;

10
src/freedreno/ir3/ir3_shared_folding.c
View file

@ -46,7 +46,7 @@ try_shared_folding(struct ir3_instruction *mov, void *mem_ctx)
for (unsigned i = 0; i < block->predecessors_count; i++) {
struct ir3_block *pred = block->predecessors[i];
if (src->srcs[i]->def) {
struct ir3_instruction *pred_mov = ir3_instr_create(pred, OPC_MOV, 1, 1);
struct ir3_instruction *pred_mov = ir3_instr_create_at(ir3_before_terminator(pred), OPC_MOV, 1, 1);
__ssa_dst(pred_mov)->flags |= (src->srcs[i]->flags & IR3_REG_HALF);
unsigned src_flags = IR3_REG_SSA | IR3_REG_SHARED |
(src->srcs[i]->flags & IR3_REG_HALF);
@ -95,12 +95,10 @@ try_shared_folding(struct ir3_instruction *mov, void *mem_ctx)
continue;
if (!shared_mov) {
shared_mov = ir3_MOV(src->block, src, mov->cat1.src_type);
struct ir3_builder build =
ir3_builder_at(ir3_after_instr_and_phis(src));
shared_mov = ir3_MOV(&build, src, mov->cat1.src_type);
shared_mov->dsts[0]->flags |= IR3_REG_SHARED;
if (src->opc == OPC_META_PHI)
ir3_instr_move_after_phis(shared_mov, src->block);
else
ir3_instr_move_after(shared_mov, src);
shared_mov->uses = _mesa_pointer_set_create(mem_ctx);
}

37
src/freedreno/ir3/ir3_shared_ra.c
View file

@ -391,14 +391,13 @@ split(struct ir3_register *def, unsigned offset, struct ir3_instruction *before)
}
struct ir3_instruction *split =
ir3_instr_create(before->block, OPC_META_SPLIT, 1, 1);
ir3_instr_create_at(ir3_after_instr(before), OPC_META_SPLIT, 1, 1);
split->split.off = offset;
struct ir3_register *dst = __ssa_dst(split);
struct ir3_register *src =
ir3_src_create(split, INVALID_REG, def->flags & (IR3_REG_HALF | IR3_REG_SSA));
src->wrmask = def->wrmask;
src->def = def;
ir3_instr_move_after(split, before);
return dst;
}
@ -413,13 +412,11 @@ extract(struct ir3_register *parent_def, unsigned offset, unsigned elems,
return split(parent_def, offset, before);
struct ir3_instruction *collect =
ir3_instr_create(before->block, OPC_META_COLLECT, 1, elems);
ir3_instr_create_at(ir3_after_instr(before), OPC_META_COLLECT, 1, elems);
struct ir3_register *dst = __ssa_dst(collect);
dst->flags |= parent_def->flags & IR3_REG_HALF;
dst->wrmask = MASK(elems);
ir3_instr_move_after(collect, before);
for (unsigned i = 0; i < elems; i++) {
ir3_src_create(collect, INVALID_REG,
parent_def->flags & (IR3_REG_HALF | IR3_REG_SSA))->def =
@ -469,7 +466,7 @@ spill_interval(struct ra_ctx *ctx, struct ra_interval *interval)
before = last_phi_input;
}
struct ir3_instruction *mov = ir3_instr_create(before->block, OPC_MOV, 1, 1);
struct ir3_instruction *mov = ir3_instr_create_at(ir3_after_instr(before), OPC_MOV, 1, 1);
mov->flags |= IR3_INSTR_SHARED_SPILL;
struct ir3_register *dst = __ssa_dst(mov);
dst->flags |= (interval->interval.reg->flags & IR3_REG_HALF);
@ -482,7 +479,6 @@ spill_interval(struct ra_ctx *ctx, struct ra_interval *interval)
mov->cat1.src_type = mov->cat1.dst_type =
(interval->interval.reg->flags & IR3_REG_HALF) ? TYPE_U16 : TYPE_U32;
ir3_instr_move_after(mov, before);
interval->spill_def = dst;
}
@ -697,11 +693,11 @@ reload_src(struct ra_ctx *ctx, struct ir3_instruction *instr,
}
static void
reload_interval(struct ra_ctx *ctx, struct ir3_instruction *instr,
struct ir3_block *block, struct ra_interval *interval)
reload_interval(struct ra_ctx *ctx, struct ir3_cursor cursor,
struct ra_interval *interval)
{
struct ir3_register *def = interval->interval.reg;
struct ir3_instruction *mov = ir3_instr_create(block, OPC_MOV, 1, 1);
struct ir3_instruction *mov = ir3_instr_create_at(cursor, OPC_MOV, 1, 1);
mov->flags |= IR3_INSTR_SHARED_SPILL;
unsigned flags = IR3_REG_SHARED | (def->flags & IR3_REG_HALF);
ir3_dst_create(mov, ra_physreg_to_num(interval->physreg_start, flags),
@ -715,9 +711,6 @@ reload_interval(struct ra_ctx *ctx, struct ir3_instruction *instr,
mov_src->wrmask = def->wrmask;
mov->cat1.src_type = mov->cat1.dst_type =
(def->flags & IR3_REG_HALF) ? TYPE_U16 : TYPE_U32;
if (instr)
ir3_instr_move_before(mov, instr);
}
static void
@ -730,7 +723,7 @@ reload_src_finalize(struct ra_ctx *ctx, struct ir3_instruction *instr,
if (!interval->needs_reload)
return;
reload_interval(ctx, instr, instr->block, interval);
reload_interval(ctx, ir3_before_instr(instr), interval);
interval->needs_reload = false;
}
@ -903,13 +896,12 @@ handle_dst(struct ra_ctx *ctx, struct ir3_instruction *instr,
d("insert dst %u physreg %u", dst->name, physreg);
if (dst->tied) {
struct ir3_instruction *mov = ir3_instr_create(instr->block, OPC_META_PARALLEL_COPY, 1, 1);
struct ir3_instruction *mov = ir3_instr_create_at(ir3_before_instr(instr), OPC_META_PARALLEL_COPY, 1, 1);
unsigned flags = IR3_REG_SHARED | (dst->flags & IR3_REG_HALF);
ir3_dst_create(mov, dst->num, flags)->wrmask = dst->wrmask;
ir3_src_create(mov, dst->tied->num, flags)->wrmask = dst->wrmask;
mov->cat1.src_type = mov->cat1.dst_type =
(dst->flags & IR3_REG_HALF) ? TYPE_U16 : TYPE_U32;;
ir3_instr_move_before(mov, instr);
dst->tied->num = dst->num;
}
}
@ -975,14 +967,13 @@ handle_split(struct ra_ctx *ctx, struct ir3_instruction *split)
if (src_interval->spill_def) {
struct ir3_instruction *spill_split =
ir3_instr_create(split->block, OPC_META_SPLIT, 1, 1);
ir3_instr_create_at(ir3_after_instr(split), OPC_META_SPLIT, 1, 1);
struct ir3_register *dst = __ssa_dst(spill_split);
struct ir3_register *src =
ir3_src_create(spill_split, INVALID_REG, IR3_REG_SSA);
src->def = src_interval->spill_def;
src->wrmask = src_interval->spill_def->wrmask;
spill_split->split.off = split->split.off;
ir3_instr_move_after(spill_split, split);
dst_interval->spill_def = dst;
list_del(&split->node);
return;
@ -1145,7 +1136,7 @@ reload_live_outs(struct ra_ctx *ctx, struct ir3_block *block)
struct ra_interval *interval = &ctx->intervals[name];
if (!interval->interval.inserted) {
d("reloading %d at end of backedge", reg->name);
reload_interval(ctx, NULL, block, interval);
reload_interval(ctx, ir3_before_terminator(block), interval);
}
}
}
@ -1273,7 +1264,7 @@ lower_pcopy(struct ir3 *ir, struct ra_ctx *ctx)
* non-shared->non-shared copy).
*/
struct ir3_instruction *mov =
ir3_instr_create(block, OPC_MOV, 1, 1);
ir3_instr_create_at(ir3_before_instr(instr), OPC_MOV, 1, 1);
mov->flags |= IR3_INSTR_SHARED_SPILL;
struct ir3_register *dst =
ir3_dst_create(mov, INVALID_REG, instr->dsts[i]->flags);
@ -1289,7 +1280,6 @@ lower_pcopy(struct ir3 *ir, struct ra_ctx *ctx)
(mov->dsts[0]->flags & IR3_REG_HALF) ? TYPE_U16 : TYPE_U32;
instr->srcs[i]->flags = mov->dsts[0]->flags;
instr->srcs[i]->def = mov->dsts[0];
ir3_instr_move_before(mov, instr);
}
}
@ -1300,7 +1290,7 @@ lower_pcopy(struct ir3 *ir, struct ra_ctx *ctx)
/* non-shared->shared. Create a reload move.
*/
struct ir3_instruction *mov =
ir3_instr_create(block, OPC_MOV, 1, 1);
ir3_instr_create_at(ir3_after_instr(instr), OPC_MOV, 1, 1);
mov->flags |= IR3_INSTR_SHARED_SPILL;
struct ir3_register *dst =
ir3_dst_create(mov, instr->dsts[i]->num,
@ -1345,7 +1335,6 @@ lower_pcopy(struct ir3 *ir, struct ra_ctx *ctx)
instr->dsts[i] = instr->dsts[instr->dsts_count - 1];
instr->srcs_count--;
instr->dsts_count--;
ir3_instr_move_after(mov, instr);
continue;
}
@ -1365,7 +1354,7 @@ lower_pcopy(struct ir3 *ir, struct ra_ctx *ctx)
if (non_shared_copies != 0) {
struct ir3_instruction *pcopy =
ir3_instr_create(block, OPC_META_PARALLEL_COPY,
ir3_instr_create_at(ir3_before_terminator(block), OPC_META_PARALLEL_COPY,
non_shared_copies, non_shared_copies);
unsigned j = 0;

3
src/freedreno/ir3/ir3_spill.c
View file

@ -127,6 +127,7 @@ static void
add_base_reg(struct ra_spill_ctx *ctx, struct ir3 *ir)
{
struct ir3_block *start = ir3_start_block(ir);
struct ir3_builder build = ir3_builder_at(ir3_after_block(start));
/* We need to stick it after any meta instructions which need to be first. */
struct ir3_instruction *after = NULL;
@ -138,7 +139,7 @@ add_base_reg(struct ra_spill_ctx *ctx, struct ir3 *ir)
}
}
struct ir3_instruction *mov = create_immed(start, 0);
struct ir3_instruction *mov = create_immed(&build, 0);
if (after)
ir3_instr_move_before(mov, after);