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gallium/radeon: emit relocations for query fences

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This is only needed for r600 which doesn't have ARB_query_buffer_object and
therefore wouldn't really need the fences, but let's be optimistic about
filling in this feature gap eventually.

Cc: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
This commit is contained in:
Nicolai Hähnle 2016-09-30 11:46:47 +02:00
parent 3e7cced4b9
commit fd9f54223d
4 changed files with 15 additions and 9 deletions
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7
src/gallium/drivers/radeon/r600_pipe_common.c
View file

@ -80,7 +80,7 @@ void radeon_shader_binary_clean(struct radeon_shader_binary *b)
* pipe_context
*/
void r600_gfx_write_fence(struct r600_common_context *ctx,
void r600_gfx_write_fence(struct r600_common_context *ctx, struct r600_resource *buf,
uint64_t va, uint32_t old_value, uint32_t new_value)
{
struct radeon_winsys_cs *cs = ctx->gfx.cs;
@ -106,6 +106,8 @@ void r600_gfx_write_fence(struct r600_common_context *ctx,
radeon_emit(cs, (va >> 32) | EOP_DATA_SEL(1));
radeon_emit(cs, new_value); /* immediate data */
radeon_emit(cs, 0); /* unused */
r600_emit_reloc(ctx, &ctx->gfx, buf, RADEON_USAGE_WRITE, RADEON_PRIO_QUERY);
}
unsigned r600_gfx_write_fence_dwords(struct r600_common_screen *screen)
@ -115,6 +117,9 @@ unsigned r600_gfx_write_fence_dwords(struct r600_common_screen *screen)
if (screen->chip_class == CIK)
dwords *= 2;
if (!screen->info.has_virtual_memory)
dwords += 2;
return dwords;
}

2
src/gallium/drivers/radeon/r600_pipe_common.h
View file

@ -700,7 +700,7 @@ r600_invalidate_resource(struct pipe_context *ctx,
struct pipe_resource *resource);
/* r600_common_pipe.c */
void r600_gfx_write_fence(struct r600_common_context *ctx,
void r600_gfx_write_fence(struct r600_common_context *ctx, struct r600_resource *buf,
uint64_t va, uint32_t old_value, uint32_t new_value);
unsigned r600_gfx_write_fence_dwords(struct r600_common_screen *screen);
void r600_gfx_wait_fence(struct r600_common_context *ctx,

13
src/gallium/drivers/radeon/r600_query.c
View file

@ -616,6 +616,7 @@ static void r600_query_hw_do_emit_stop(struct r600_common_context *ctx,
uint64_t va)
{
struct radeon_winsys_cs *cs = ctx->gfx.cs;
uint64_t fence_va = 0;
switch (query->b.type) {
case PIPE_QUERY_OCCLUSION_COUNTER:
@ -626,8 +627,7 @@ static void r600_query_hw_do_emit_stop(struct r600_common_context *ctx,
radeon_emit(cs, va);
radeon_emit(cs, (va >> 32) & 0xFFFF);
va += ctx->max_db * 16 - 8;
r600_gfx_write_fence(ctx, va, 0, 0x80000000);
fence_va = va + ctx->max_db * 16 - 8;
break;
case PIPE_QUERY_PRIMITIVES_EMITTED:
case PIPE_QUERY_PRIMITIVES_GENERATED:
@ -650,8 +650,7 @@ static void r600_query_hw_do_emit_stop(struct r600_common_context *ctx,
radeon_emit(cs, 0);
radeon_emit(cs, 0);
va += 8;
r600_gfx_write_fence(ctx, va, 0, 0x80000000);
fence_va = va + 8;
break;
case PIPE_QUERY_PIPELINE_STATISTICS: {
unsigned sample_size = (query->result_size - 8) / 2;
@ -662,8 +661,7 @@ static void r600_query_hw_do_emit_stop(struct r600_common_context *ctx,
radeon_emit(cs, va);
radeon_emit(cs, (va >> 32) & 0xFFFF);
va += sample_size;
r600_gfx_write_fence(ctx, va, 0, 0x80000000);
fence_va = va + sample_size;
break;
}
default:
@ -671,6 +669,9 @@ static void r600_query_hw_do_emit_stop(struct r600_common_context *ctx,
}
r600_emit_reloc(ctx, &ctx->gfx, query->buffer.buf, RADEON_USAGE_WRITE,
RADEON_PRIO_QUERY);
if (fence_va)
r600_gfx_write_fence(ctx, query->buffer.buf, fence_va, 0, 0x80000000);
}
static void r600_query_hw_emit_stop(struct r600_common_context *ctx,

2
src/gallium/drivers/radeonsi/si_perfcounter.c
View file

@ -591,7 +591,7 @@ static void si_pc_emit_stop(struct r600_common_context *ctx,
{
struct radeon_winsys_cs *cs = ctx->gfx.cs;
r600_gfx_write_fence(ctx, va, 1, 0);
r600_gfx_write_fence(ctx, buffer, va, 1, 0);
r600_gfx_wait_fence(ctx, va, 0, 0xffffffff);
radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0));