diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index b3be20c2e52..554095415c3 100644
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -1268,11 +1268,16 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
 
    info->has_export_conflict_bug = info->gfx_level == GFX11;
 
-   /* GFX6-8 SDMA can't ignore page faults on unmapped sparse resources. */
-   info->sdma_supports_sparse = info->gfx_level >= GFX9;
+   /* Convert the SDMA version in the current GPU to an enum. */
+   info->sdma_ip_version =
+      (enum sdma_version)SDMA_VERSION_VALUE(info->ip[AMD_IP_SDMA].ver_major,
+                                            info->ip[AMD_IP_SDMA].ver_minor);
 
-   /* GFX10+ SDMA supports DCC and HTILE, but Navi 10 has issues with it according to PAL. */
-   info->sdma_supports_compression = info->gfx_level >= GFX10 && info->family != CHIP_NAVI10;
+   /* SDMA v1.0-3.x (GFX6-8) can't ignore page faults on unmapped sparse resources. */
+   info->sdma_supports_sparse = info->sdma_ip_version >= SDMA_4_0;
+
+   /* SDMA v5.0+ (GFX10+) supports DCC and HTILE, but Navi 10 has issues with it according to PAL. */
+   info->sdma_supports_compression = info->sdma_ip_version >= SDMA_5_0 && info->family != CHIP_NAVI10;
 
    /* Get the number of good compute units. */
    info->num_cu = 0;
diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h
index 2303c06be21..376728c36f4 100644
--- a/src/amd/common/ac_gpu_info.h
+++ b/src/amd/common/ac_gpu_info.h
@@ -194,6 +194,7 @@ struct radeon_info {
    } dec_caps, enc_caps;
 
    enum vcn_version vcn_ip_version;
+   enum sdma_version sdma_ip_version;
 
    /* Kernel & winsys capabilities. */
    uint32_t drm_major; /* version */
diff --git a/src/amd/common/amd_family.h b/src/amd/common/amd_family.h
index 719cf6092ea..f058da406c3 100644
--- a/src/amd/common/amd_family.h
+++ b/src/amd/common/amd_family.h
@@ -202,6 +202,40 @@ enum vcn_version{
    VCN_4_0_5,
 };
 
+#define SDMA_VERSION_VALUE(major, minor) (((major) << 8) | (minor))
+
+enum sdma_version {
+   SDMA_UNKNOWN = 0,
+   /* GFX6 */
+   SDMA_1_0 = SDMA_VERSION_VALUE(1, 0),
+
+   /* GFX7 */
+   SDMA_2_0 = SDMA_VERSION_VALUE(2, 0),
+
+   /* GFX8 */
+   SDMA_2_4 = SDMA_VERSION_VALUE(2, 4),
+   SDMA_3_0 = SDMA_VERSION_VALUE(3, 0),
+   SDMA_3_1 = SDMA_VERSION_VALUE(3, 1),
+
+   /* GFX9 */
+   SDMA_4_0 = SDMA_VERSION_VALUE(4, 0),
+   SDMA_4_1 = SDMA_VERSION_VALUE(4, 1),
+   SDMA_4_2 = SDMA_VERSION_VALUE(4, 2),
+   SDMA_4_4 = SDMA_VERSION_VALUE(4, 4),
+
+   /* GFX10 */
+   SDMA_5_0 = SDMA_VERSION_VALUE(5, 0),
+
+   /* GFX10.3 */
+   SDMA_5_2 = SDMA_VERSION_VALUE(5, 2),
+
+   /* GFX11 */
+   SDMA_6_0 = SDMA_VERSION_VALUE(6, 0),
+
+   /* GFX11.5 */
+   SDMA_6_1 = SDMA_VERSION_VALUE(6, 1),
+};
+
 const char *ac_get_family_name(enum radeon_family family);
 enum amd_gfx_level ac_get_gfx_level(enum radeon_family family);
 unsigned ac_get_family_id(enum radeon_family family);