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nir/lower_fp16_casts: correctly round RTNE f64->f16 casts
Based on brw_nir_lower_conversions. Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Ivan Briano <ivan.briano@intel.com> Reviewed-by: Georg Lehmann <dadschoorse@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25566>
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1 changed files with 60 additions and 2 deletions
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@ -69,8 +69,6 @@ float_to_half_impl(nir_builder *b, nir_def *src, nir_rounding_mode mode)
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nir_def *f32infinity = nir_imm_int(b, 255 << 23);
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nir_def *f16max = nir_imm_int(b, (127 + 16) << 23);
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if (src->bit_size == 64)
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src = nir_f2f32(b, src);
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nir_def *sign = nir_iand_imm(b, src, 0x80000000);
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nir_def *one = nir_imm_int(b, 1);
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@ -168,6 +166,64 @@ float_to_half_impl(nir_builder *b, nir_def *src, nir_rounding_mode mode)
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return nir_u2u16(b, nir_ior(b, fp16, nir_ushr_imm(b, sign, 16)));
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}
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static nir_def *
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split_f2f16_conversion(nir_builder *b, nir_def *src, nir_rounding_mode rnd)
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{
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nir_def *tmp = nir_f2f32(b, src);
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if (rnd == nir_rounding_mode_rtne) {
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/* We round down from double to half float by going through float in
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* between, but this can give us inaccurate results in some cases. One
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* such case is 0x40ee6a0000000001, which should round to 0x7b9b, but
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* going through float first turns into 0x7b9a instead. This is because
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* the first non-fitting bit is set, so we get a tie, but with the least
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* significant bit of the original number set, the tie should break
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* rounding up. The cast to float, however, turns into 0x47735000, which
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* when going to half still ties, but now we lost the tie-up bit, and
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* instead we round to the nearest even, which in this case is down.
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*
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* To fix this, we check if the original would have tied, and if the tie
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* would have rounded up, and if both are true, set the least
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* significant bit of the intermediate float to 1, so that a tie on the
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* next cast rounds up as well. If the rounding already got rid of the
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* tie, that set bit will just be truncated anyway and the end result
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* doesn't change.
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*
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* Another failing case is 0x40effdffffffffff. This one doesn't have the
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* tie from double to half, so it just rounds down to 0x7bff (65504.0),
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* but going through float first, it turns into 0x477ff000, which does
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* have the tie bit for half set, and when that one gets rounded it
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* turns into 0x7c00 (Infinity).
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* The fix for that one is to make sure the intermediate float does not
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* have the tie bit set if the original didn't have it.
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*
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* For the RTZ case, we don't need to do anything, as the intermediate
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* float should be ok already.
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*/
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int significand_bits16 = 10;
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int significand_bits32 = 23;
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int significand_bits64 = 52;
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int f64_to_16_tie_bit = significand_bits64 - significand_bits16 - 1;
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int f32_to_16_tie_bit = significand_bits32 - significand_bits16 - 1;
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uint64_t f64_rounds_up_mask = ((1ULL << f64_to_16_tie_bit) - 1);
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nir_def *would_tie = nir_iand_imm(b, src, 1ULL << f64_to_16_tie_bit);
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nir_def *would_rnd_up = nir_iand_imm(b, src, f64_rounds_up_mask);
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nir_def *tie_up = nir_b2i32(b, nir_ine_imm(b, would_rnd_up, 0));
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nir_def *break_tie = nir_bcsel(b,
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nir_ine_imm(b, would_tie, 0),
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nir_imm_int(b, ~0),
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nir_imm_int(b, ~(1U << f32_to_16_tie_bit)));
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tmp = nir_ior(b, tmp, tie_up);
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tmp = nir_iand(b, tmp, break_tie);
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}
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return tmp;
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}
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static bool
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lower_fp16_cast_impl(nir_builder *b, nir_instr *instr, void *data)
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{
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@ -242,6 +298,8 @@ lower_fp16_cast_impl(nir_builder *b, nir_instr *instr, void *data)
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for (unsigned i = 0; i < dst->num_components; i++) {
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nir_def *comp = nir_channel(b, src, swizzle ? swizzle[i] : i);
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if (comp->bit_size == 64)
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comp = split_f2f16_conversion(b, comp, mode);
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rets[i] = float_to_half_impl(b, comp, mode);
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}
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