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radeonsi: fix CMASK and HTILE calculations for Hawaii

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This fixes the checkerboard pattern in glxgears and anything that triggers
fast color clear.

num_channels is always <= 8, but Hawaii has 16 pipes.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 9b046474c9)
This commit is contained in:
Marek Olšák 2014-07-26 00:48:48 +02:00 • committed by Carl Worth
parent d59406cdb7
commit fcb6c0d2b8
1 changed files with 2 additions and 2 deletions
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4
src/gallium/drivers/radeon/r600_texture.c
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@ -388,7 +388,7 @@ static void si_texture_get_cmask_info(struct r600_common_screen *rscreen,
struct r600_cmask_info *out)
{
unsigned pipe_interleave_bytes = rscreen->tiling_info.group_bytes;
unsigned num_pipes = rscreen->tiling_info.num_channels;
unsigned num_pipes = rscreen->info.r600_num_tile_pipes;
unsigned cl_width, cl_height;
switch (num_pipes) {
@ -485,7 +485,7 @@ static unsigned si_texture_htile_alloc_size(struct r600_common_screen *rscreen,
{
unsigned cl_width, cl_height, width, height;
unsigned slice_elements, slice_bytes, pipe_interleave_bytes, base_align;
unsigned num_pipes = rscreen->tiling_info.num_channels;
unsigned num_pipes = rscreen->info.r600_num_tile_pipes;
/* HTILE is broken with 1D tiling on old kernels and CIK. */
if (rtex->surface.level[0].mode == RADEON_SURF_MODE_1D &&