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mesa: Remove EmitCondCodes.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Acked-by: Brian Paul <brianp@vmware.com>
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7fe206da28
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5 changed files with 2 additions and 53 deletions
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@ -209,34 +209,6 @@ The final vertex and fragment programs may be interpreted in software
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(see drivers/dri/i915/i915_fragprog.c for example).
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</p>
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<h3>Code Generation Options</h3>
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<p>
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Internally, there are several options that control the compiler's code
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generation and instruction selection.
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These options are seen in the gl_shader_state struct and may be set
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by the device driver to indicate its preferences:
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<pre>
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struct gl_shader_state
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{
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...
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/** Driver-selectable options: */
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GLboolean EmitCondCodes;
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};
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</pre>
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<dl>
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<dt>EmitCondCodes</dt>
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<dd>
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If set, condition codes (ala GL_NV_fragment_program) will be used for
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branching and looping.
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Otherwise, ordinary registers will be used (the IF instruction will
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examine the first operand's X component and do the if-part if non-zero).
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</dd>
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</dl>
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<h2 id="validation">Compiler Validation</h2>
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<p>
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@ -254,7 +254,6 @@ i915CreateContext(int api,
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/* FINISHME: Are there other options that should be enabled for software
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* FINISHME: vertex shaders?
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*/
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ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].EmitCondCodes = true;
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ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].EmitNoIndirectSampler =
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true;
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@ -143,7 +143,6 @@ brw_compiler_create(void *mem_ctx, const struct brw_device_info *devinfo)
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compiler->glsl_compiler_options[i].MaxIfDepth =
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devinfo->gen < 6 ? 16 : UINT_MAX;
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compiler->glsl_compiler_options[i].EmitCondCodes = true;
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compiler->glsl_compiler_options[i].EmitNoNoise = true;
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compiler->glsl_compiler_options[i].EmitNoMainReturn = true;
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compiler->glsl_compiler_options[i].EmitNoIndirectInput = true;
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@ -2946,7 +2946,6 @@ struct gl_pipeline_shader_state
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struct gl_shader_compiler_options
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{
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/** Driver-selectable options: */
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GLboolean EmitCondCodes; /**< Use condition codes? */
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GLboolean EmitNoLoops;
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GLboolean EmitNoFunctions;
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GLboolean EmitNoCont; /**< Emit CONT opcode? */
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@ -2124,32 +2124,12 @@ ir_to_mesa_visitor::visit(ir_discard *ir)
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void
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ir_to_mesa_visitor::visit(ir_if *ir)
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{
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ir_to_mesa_instruction *cond_inst, *if_inst;
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ir_to_mesa_instruction *prev_inst;
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prev_inst = (ir_to_mesa_instruction *)this->instructions.get_tail();
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ir_to_mesa_instruction *if_inst;
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ir->condition->accept(this);
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assert(this->result.file != PROGRAM_UNDEFINED);
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if (this->options->EmitCondCodes) {
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cond_inst = (ir_to_mesa_instruction *)this->instructions.get_tail();
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/* See if we actually generated any instruction for generating
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* the condition. If not, then cook up a move to a temp so we
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* have something to set cond_update on.
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*/
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if (cond_inst == prev_inst) {
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src_reg temp = get_temp(glsl_type::bool_type);
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cond_inst = emit(ir->condition, OPCODE_MOV, dst_reg(temp), result);
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}
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cond_inst->cond_update = GL_TRUE;
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if_inst = emit(ir->condition, OPCODE_IF);
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if_inst->dst.cond_mask = COND_NE;
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} else {
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if_inst = emit(ir->condition, OPCODE_IF, undef_dst, this->result);
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}
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if_inst = emit(ir->condition, OPCODE_IF, undef_dst, this->result);
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this->instructions.push_tail(if_inst);
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