diff --git a/.pick_status.json b/.pick_status.json
index 0b3de5b5fc9..043453a5573 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -4374,7 +4374,7 @@
         "description": "radeonsi: set valid_buffer_range for CL buffers",
         "nominated": true,
         "nomination_type": 1,
-        "resolution": 0,
+        "resolution": 1,
         "main_sha": null,
         "because_sha": null,
         "notes": null
diff --git a/src/amd/ci/radeonsi-raven-fails.txt b/src/amd/ci/radeonsi-raven-fails.txt
index c060697dd12..13e1373c8f1 100644
--- a/src/amd/ci/radeonsi-raven-fails.txt
+++ b/src/amd/ci/radeonsi-raven-fails.txt
@@ -46,7 +46,6 @@ api@clgetdeviceinfo,Fail
 api@clgetextensionfunctionaddressforplatform,Fail
 api@clgetkernelarginfo,Fail
 api@cllinkprogram,Fail
-custom@r600 create release buffer bug,Fail
 program@build@vector-data-types,Fail
 program@execute@builtin@builtin-float-nextafter-1.0.generated,Fail
 program@execute@builtin@builtin-float-nextafter-1.0.generated@nextafter float1,Fail
diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c
index b46be1f4809..75a8002723d 100644
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -233,8 +233,10 @@ static void si_set_global_binding(struct pipe_context *ctx, unsigned first, unsi
    for (i = 0; i < n; i++) {
       uint64_t va;
       uint32_t offset;
+      struct si_resource *res = si_resource(resources[i]);
       pipe_resource_reference(&sctx->global_buffers[first + i], resources[i]);
-      va = si_resource(resources[i])->gpu_address;
+      util_range_add(&res->b.b, &res->valid_buffer_range, 0, res->b.b.width0);
+      va = res->gpu_address;
       offset = util_le32_to_cpu(*handles[i]);
       va += offset;
       va = util_cpu_to_le64(va);
@@ -920,6 +922,7 @@ static void si_launch_grid(struct pipe_context *ctx, const struct pipe_grid_info
       if (!buffer) {
          continue;
       }
+      util_range_add(&buffer->b.b, &buffer->valid_buffer_range, 0, buffer->b.b.width0);
       radeon_add_to_buffer_list(sctx, &sctx->gfx_cs, buffer,
                                 RADEON_USAGE_READWRITE | RADEON_PRIO_SHADER_RW_BUFFER);
    }