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r600/sfn: Simplify scheduling
Group together instructions that are * emitted at CF level * in a GDS block. Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37096>
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11c91aa5fb
commit
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1 changed files with 23 additions and 64 deletions
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@ -71,15 +71,15 @@ public:
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m_cf_instr = instr;
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m_cf_instr = instr;
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}
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}
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void visit(ScratchIOInstr *instr) override { mem_write_instr.push_back(instr); }
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void visit(ScratchIOInstr *instr) override { free_instr.push_back(instr); }
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void visit(StreamOutInstr *instr) override { mem_write_instr.push_back(instr); }
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void visit(StreamOutInstr *instr) override { free_instr.push_back(instr); }
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void visit(MemRingOutInstr *instr) override { mem_ring_writes.push_back(instr); }
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void visit(MemRingOutInstr *instr) override { free_instr.push_back(instr); }
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void visit(GDSInstr *instr) override { gds_op.push_back(instr); }
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void visit(GDSInstr *instr) override { gds_instr.push_back(instr); }
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void visit(WriteTFInstr *instr) override { write_tf.push_back(instr); }
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void visit(WriteTFInstr *instr) override { gds_instr.push_back(instr); }
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void visit(LDSReadInstr *instr) override
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void visit(LDSReadInstr *instr) override
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{
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{
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@ -99,7 +99,7 @@ public:
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}
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}
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}
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}
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void visit(RatInstr *instr) override { rat_instr.push_back(instr); }
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void visit(RatInstr *instr) override { free_instr.push_back(instr); }
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std::list<AluInstr *> alu_trans;
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std::list<AluInstr *> alu_trans;
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std::list<AluInstr *> alu_vec;
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std::list<AluInstr *> alu_vec;
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@ -108,11 +108,8 @@ public:
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std::list<AluGroup *> alu_groups;
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std::list<AluGroup *> alu_groups;
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std::list<ExportInstr *> exports;
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std::list<ExportInstr *> exports;
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std::list<FetchInstr *> fetches;
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std::list<FetchInstr *> fetches;
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std::list<WriteOutInstr *> mem_write_instr;
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std::list<Instr *> free_instr;
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std::list<MemRingOutInstr *> mem_ring_writes;
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std::list<Instr *> gds_instr;
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std::list<GDSInstr *> gds_op;
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std::list<WriteTFInstr *> write_tf;
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std::list<RatInstr *> rat_instr;
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Instr *m_cf_instr{nullptr};
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Instr *m_cf_instr{nullptr};
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ValueFactory& m_value_factory;
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ValueFactory& m_value_factory;
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@ -187,21 +184,15 @@ private:
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std::list<TexInstr *> tex_ready;
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std::list<TexInstr *> tex_ready;
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std::list<ExportInstr *> exports_ready;
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std::list<ExportInstr *> exports_ready;
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std::list<FetchInstr *> fetches_ready;
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std::list<FetchInstr *> fetches_ready;
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std::list<WriteOutInstr *> memops_ready;
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std::list<Instr *> free_ready;
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std::list<MemRingOutInstr *> mem_ring_writes_ready;
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std::list<Instr *> gds_ready;
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std::list<GDSInstr *> gds_ready;
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std::list<WriteTFInstr *> write_tf_ready;
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std::list<RatInstr *> rat_instr_ready;
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enum {
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enum {
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sched_alu,
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sched_alu,
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sched_tex,
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sched_tex,
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sched_fetch,
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sched_fetch,
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sched_free,
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sched_free,
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sched_mem_ring,
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sched_gds,
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sched_gds,
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sched_write_tf,
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sched_rat,
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} current_shed;
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} current_shed;
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ExportInstr *m_last_pos;
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ExportInstr *m_last_pos;
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@ -337,21 +328,15 @@ BlockScheduler::schedule_block(Block& in_block,
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sfn_log << SfnLog::schedule << " TEX:" << tex_ready.size() << "\n";
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sfn_log << SfnLog::schedule << " TEX:" << tex_ready.size() << "\n";
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if (fetches_ready.size())
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if (fetches_ready.size())
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sfn_log << SfnLog::schedule << " FETCH:" << fetches_ready.size() << "\n";
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sfn_log << SfnLog::schedule << " FETCH:" << fetches_ready.size() << "\n";
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if (mem_ring_writes_ready.size())
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if (free_ready.size())
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sfn_log << SfnLog::schedule << " MEM_RING:" << mem_ring_writes_ready.size()
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sfn_log << SfnLog::schedule << " GENERIC:" << free_ready.size() << "\n";
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<< "\n";
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if (gds_ready.size())
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if (memops_ready.size())
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sfn_log << SfnLog::schedule << " GDS:" << gds_ready.size() << "\n";
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sfn_log << SfnLog::schedule << " MEM_OPS:" << mem_ring_writes_ready.size()
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<< "\n";
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if (!m_current_block->lds_group_active() &&
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if (!m_current_block->lds_group_active() &&
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m_current_block->expected_ar_uses() == 0) {
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m_current_block->expected_ar_uses() == 0) {
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if (last_shed != sched_free && memops_ready.size() > 8)
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if (last_shed != sched_free && free_ready.size() > 8)
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current_shed = sched_free;
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current_shed = sched_free;
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else if (mem_ring_writes_ready.size() > 15)
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current_shed = sched_mem_ring;
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else if (rat_instr_ready.size() > 3)
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current_shed = sched_rat;
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else if (tex_ready.size() > (m_chip_class >= ISA_CC_EVERGREEN ? 15 : 7))
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else if (tex_ready.size() > (m_chip_class >= ISA_CC_EVERGREEN ? 15 : 7))
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current_shed = sched_tex;
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current_shed = sched_tex;
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}
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}
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@ -384,32 +369,10 @@ BlockScheduler::schedule_block(Block& in_block,
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schedule_gds(out_blocks, gds_ready);
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schedule_gds(out_blocks, gds_ready);
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last_shed = current_shed;
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last_shed = current_shed;
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}
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}
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current_shed = sched_mem_ring;
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current_shed = sched_free;
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continue;
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continue;
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case sched_mem_ring:
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if (mem_ring_writes_ready.empty() ||
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!schedule_cf(out_blocks, mem_ring_writes_ready)) {
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current_shed = sched_write_tf;
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continue;
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}
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last_shed = current_shed;
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break;
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case sched_write_tf:
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if (write_tf_ready.empty() || !schedule_gds(out_blocks, write_tf_ready)) {
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current_shed = sched_rat;
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continue;
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}
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last_shed = current_shed;
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break;
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case sched_rat:
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if (rat_instr_ready.empty() || !schedule_cf(out_blocks, rat_instr_ready)) {
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current_shed = sched_free;
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continue;
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}
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last_shed = current_shed;
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break;
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case sched_free:
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case sched_free:
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if (memops_ready.empty() || !schedule_cf(out_blocks, memops_ready)) {
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if (free_ready.empty() || !schedule_cf(out_blocks, free_ready)) {
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current_shed = sched_alu;
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current_shed = sched_alu;
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break;
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break;
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}
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}
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@ -466,9 +429,9 @@ BlockScheduler::schedule_block(Block& in_block,
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}
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}
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fail = true;
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fail = true;
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}
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}
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if (!cir.mem_write_instr.empty()) {
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if (!cir.free_instr.empty()) {
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std::cerr << "Unscheduled MEM ops:\n";
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std::cerr << "Unscheduled MEM ops:\n";
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for (auto& a : cir.mem_write_instr) {
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for (auto& a : cir.free_instr) {
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std::cerr << " " << *a << "\n";
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std::cerr << " " << *a << "\n";
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}
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}
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fail = true;
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fail = true;
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@ -507,8 +470,7 @@ BlockScheduler::schedule_block(Block& in_block,
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assert(cir.exports.empty());
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assert(cir.exports.empty());
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assert(cir.fetches.empty());
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assert(cir.fetches.empty());
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assert(cir.alu_vec.empty());
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assert(cir.alu_vec.empty());
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assert(cir.mem_write_instr.empty());
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assert(cir.free_instr.empty());
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assert(cir.mem_ring_writes.empty());
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assert(!fail);
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assert(!fail);
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@ -1132,13 +1094,10 @@ BlockScheduler::collect_ready(CollectInstructions& available)
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result |= collect_ready_type(alu_trans_ready, available.alu_trans);
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result |= collect_ready_type(alu_trans_ready, available.alu_trans);
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result |= collect_ready_type(alu_multi_slot_ready, available.alu_multi_slot);
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result |= collect_ready_type(alu_multi_slot_ready, available.alu_multi_slot);
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result |= collect_ready_type(alu_groups_ready, available.alu_groups);
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result |= collect_ready_type(alu_groups_ready, available.alu_groups);
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result |= collect_ready_type(gds_ready, available.gds_op);
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result |= collect_ready_type(gds_ready, available.gds_instr);
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result |= collect_ready_type(tex_ready, available.tex);
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result |= collect_ready_type(tex_ready, available.tex);
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result |= collect_ready_type(fetches_ready, available.fetches);
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result |= collect_ready_type(fetches_ready, available.fetches);
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result |= collect_ready_type(memops_ready, available.mem_write_instr);
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result |= collect_ready_type(free_ready, available.free_instr);
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result |= collect_ready_type(mem_ring_writes_ready, available.mem_ring_writes);
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result |= collect_ready_type(write_tf_ready, available.write_tf);
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result |= collect_ready_type(rat_instr_ready, available.rat_instr);
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sfn_log << SfnLog::schedule << "\n";
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sfn_log << SfnLog::schedule << "\n";
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return result;
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return result;
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@ -1260,7 +1219,7 @@ template <> struct type_char<GDSInstr> {
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static char value() { return 'S';};
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static char value() { return 'S';};
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};
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};
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template <> struct type_char<RatInstr> {
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template <> struct type_char<Instr> {
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static char value() { return 'I';};
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static char value() { return 'I';};
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};
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};
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