diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 9509802039b..4fc3c11aa4e 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -1654,8 +1654,7 @@ radv_emit_fb_color_state(struct radv_cmd_buffer *cmd_buffer,
 
 	if (radv_image_has_fmask(image) &&
 	    (radv_is_fmask_decompress_pipeline(cmd_buffer) ||
-	     radv_is_hw_resolve_pipeline(cmd_buffer) ||
-	     radv_is_blit2d_msaa_pipeline(cmd_buffer))) {
+	     radv_is_hw_resolve_pipeline(cmd_buffer))) {
 		/* Make sure FMASK is enabled if it has been cleared because:
 		 *
 		 * 1) it's required for FMASK_DECOMPRESS operations to avoid
diff --git a/src/amd/vulkan/radv_meta.h b/src/amd/vulkan/radv_meta.h
index 9d2e77f54de..ed461575e6c 100644
--- a/src/amd/vulkan/radv_meta.h
+++ b/src/amd/vulkan/radv_meta.h
@@ -303,28 +303,6 @@ radv_is_hw_resolve_pipeline(struct radv_cmd_buffer *cmd_buffer)
 	return false;
 }
 
-/**
- * Return whether the bound pipeline is a blit MSAA image pipeline.
- */
-static inline bool
-radv_is_blit2d_msaa_pipeline(struct radv_cmd_buffer *cmd_buffer)
-{
-	struct radv_meta_state *meta_state = &cmd_buffer->device->meta_state;
-	struct radv_pipeline *pipeline = cmd_buffer->state.pipeline;
-
-	if (!pipeline)
-		return false;
-
-	for (uint32_t s = 1; s < MAX_SAMPLES_LOG2; s++) {
-		for (uint32_t i = 0; i < NUM_META_FS_KEYS; i++) {
-			if (radv_pipeline_to_handle(pipeline) == meta_state->blit2d[s].pipelines[0 /* IMAGE */][i] ||
-			    radv_pipeline_to_handle(pipeline) == meta_state->blit2d[s].pipelines[1 /* IMAGE_3D */][i])
-				return true;
-		}
-	}
-	return false;
-}
-
 /* common nir builder helpers */
 #include "nir/nir_builder.h"