From fb39004b72ee0d645b13482ab1fd692a3ff5ce20 Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Thu, 18 May 2023 17:19:42 -0700 Subject: [PATCH] intel/compiler: Fix 64-bit ufind_msb, find_lsb, and bit_count We only support 32-bit versions of ufind_msb, find_lsb, and bit_count, so we need to lower them via nir_lower_int64. Previously, we were failing to do so on platforms older than Icelake and let those operations fall through to nir_lower_bit_size, which used a callback to determine it should lower them for bit_size != 32. However, that pass only emulates small bit-size operations by promoting them to supported, larger bit-sizes (i.e. 16-bit using 32-bit). It doesn't support emulating larger operations (i.e. 64-bit using 32-bit). So nir_lower_bit_size would just u2u32 the 64-bit source, causing us to flat ignore half of the bits. Commit 78a195f252d (intel/compiler: Postpone most int64 lowering to brw_postprocess_nir) provoked this bug on Icelake and later as well, by moving the nir_lower_int64 handling for ufind_msb until late in compilation, allowing it to reach nir_lower_bit_size which broke it. To fix this, we always set int64 lowering for these opcodes, and also correct the nir_lower_bit_size callback to ignore 64-bit operations. Cc: mesa-stable Reviewed-by: Alyssa Rosenzweig Reviewed-by: Karol Herbst Reviewed-by: Faith Ekstrand Part-of: (cherry picked from commit a2d384a5c0947952887115624a156afd649e20b0) --- .pick_status.json | 2 +- src/intel/compiler/brw_compiler.c | 5 ++++- src/intel/compiler/brw_nir.c | 2 +- 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index ca056f270e1..7c43f6b8e19 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -148,7 +148,7 @@ "description": "intel/compiler: Fix 64-bit ufind_msb, find_lsb, and bit_count", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null }, diff --git a/src/intel/compiler/brw_compiler.c b/src/intel/compiler/brw_compiler.c index 778c057c1b7..0c7dc3f8401 100644 --- a/src/intel/compiler/brw_compiler.c +++ b/src/intel/compiler/brw_compiler.c @@ -135,7 +135,10 @@ brw_compiler_create(void *mem_ctx, const struct intel_device_info *devinfo) nir_lower_imul64 | nir_lower_isign64 | nir_lower_divmod64 | - nir_lower_imul_high64; + nir_lower_imul_high64 | + nir_lower_find_lsb64 | + nir_lower_ufind_msb64 | + nir_lower_bit_count64; nir_lower_doubles_options fp64_options = nir_lower_drcp | nir_lower_dsqrt | diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c index 9f5d2c60f17..b2633348b70 100644 --- a/src/intel/compiler/brw_nir.c +++ b/src/intel/compiler/brw_nir.c @@ -772,7 +772,7 @@ lower_bit_size_callback(const nir_instr *instr, UNUSED void *data) * source. */ assert(alu->src[0].src.is_ssa); - return alu->src[0].src.ssa->bit_size == 32 ? 0 : 32; + return alu->src[0].src.ssa->bit_size >= 32 ? 0 : 32; default: break; }