diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index 87d9554a492..b28669e959c 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -559,7 +559,7 @@ fs_reg::fs_reg() } fs_reg::fs_reg(struct ::brw_reg reg) : - backend_reg(reg) + brw_reg(reg) { this->offset = 0; this->stride = 1; @@ -574,15 +574,17 @@ fs_reg::fs_reg(struct ::brw_reg reg) : bool fs_reg::equals(const fs_reg &r) const { - return (this->backend_reg::equals(r) && - stride == r.stride); + return brw_regs_equal(this, &r) && + offset == r.offset && + stride == r.stride; } bool fs_reg::negative_equals(const fs_reg &r) const { - return (this->backend_reg::negative_equals(r) && - stride == r.stride); + return brw_regs_negative_equal(this, &r) && + offset == r.offset && + stride == r.stride; } bool diff --git a/src/intel/compiler/brw_ir.h b/src/intel/compiler/brw_ir.h index ccb641a8fae..98ff80b201b 100644 --- a/src/intel/compiler/brw_ir.h +++ b/src/intel/compiler/brw_ir.h @@ -37,63 +37,6 @@ */ #define MAX_VGRF_SIZE(devinfo) ((devinfo)->ver >= 20 ? 40 : 20) -#ifdef __cplusplus -struct backend_reg : private brw_reg -{ - backend_reg() {} - backend_reg(const struct brw_reg ®) : brw_reg(reg), offset(0) {} - - const brw_reg &as_brw_reg() const - { - assert(file == ARF || file == FIXED_GRF || file == IMM); - assert(offset == 0); - return static_cast(*this); - } - - brw_reg &as_brw_reg() - { - assert(file == ARF || file == FIXED_GRF || file == IMM); - assert(offset == 0); - return static_cast(*this); - } - - bool equals(const backend_reg &r) const; - bool negative_equals(const backend_reg &r) const; - - bool is_zero() const; - bool is_one() const; - bool is_negative_one() const; - bool is_null() const; - bool is_accumulator() const; - - /** Offset from the start of the (virtual) register in bytes. */ - uint16_t offset; - - using brw_reg::type; - using brw_reg::file; - using brw_reg::negate; - using brw_reg::abs; - using brw_reg::address_mode; - using brw_reg::subnr; - using brw_reg::nr; - - using brw_reg::swizzle; - using brw_reg::writemask; - using brw_reg::indirect_offset; - using brw_reg::vstride; - using brw_reg::width; - using brw_reg::hstride; - - using brw_reg::df; - using brw_reg::f; - using brw_reg::d; - using brw_reg::ud; - using brw_reg::d64; - using brw_reg::u64; -}; - struct bblock_t; #endif - -#endif diff --git a/src/intel/compiler/brw_ir_fs.h b/src/intel/compiler/brw_ir_fs.h index 6f059b3c547..6d55e16c683 100644 --- a/src/intel/compiler/brw_ir_fs.h +++ b/src/intel/compiler/brw_ir_fs.h @@ -28,7 +28,7 @@ #include "brw_ir.h" #include "brw_ir_allocator.h" -class fs_reg : public backend_reg { +class fs_reg : private brw_reg { public: DECLARE_RALLOC_CXX_OPERATORS(fs_reg) @@ -39,16 +39,61 @@ public: fs_reg(enum brw_reg_file file, unsigned nr); fs_reg(enum brw_reg_file file, unsigned nr, enum brw_reg_type type); + const brw_reg &as_brw_reg() const + { + assert(file == ARF || file == FIXED_GRF || file == IMM); + assert(offset == 0); + return static_cast(*this); + } + + brw_reg &as_brw_reg() + { + assert(file == ARF || file == FIXED_GRF || file == IMM); + assert(offset == 0); + return static_cast(*this); + } + bool equals(const fs_reg &r) const; bool negative_equals(const fs_reg &r) const; bool is_contiguous() const; + bool is_zero() const; + bool is_one() const; + bool is_negative_one() const; + bool is_null() const; + bool is_accumulator() const; + /** * Return the size in bytes of a single logical component of the * register assuming the given execution width. */ unsigned component_size(unsigned width) const; + using brw_reg::type; + using brw_reg::file; + using brw_reg::negate; + using brw_reg::abs; + using brw_reg::address_mode; + using brw_reg::subnr; + using brw_reg::nr; + + using brw_reg::swizzle; + using brw_reg::writemask; + using brw_reg::indirect_offset; + using brw_reg::vstride; + using brw_reg::width; + using brw_reg::hstride; + + using brw_reg::df; + using brw_reg::f; + using brw_reg::d; + using brw_reg::ud; + using brw_reg::d64; + using brw_reg::u64; + + /** Offset from the start of the (virtual) register in bytes. */ + uint16_t offset; + /** Register region horizontal stride */ uint8_t stride; }; diff --git a/src/intel/compiler/brw_ir_performance.cpp b/src/intel/compiler/brw_ir_performance.cpp index c8adda41671..f46554355be 100644 --- a/src/intel/compiler/brw_ir_performance.cpp +++ b/src/intel/compiler/brw_ir_performance.cpp @@ -800,7 +800,7 @@ namespace { * Return the dependency ID of a backend_reg, offset by \p delta GRFs. */ enum intel_eu_dependency_id - reg_dependency_id(const intel_device_info *devinfo, const backend_reg &r, + reg_dependency_id(const intel_device_info *devinfo, const fs_reg &r, const int delta) { if (r.file == VGRF) { diff --git a/src/intel/compiler/brw_shader.cpp b/src/intel/compiler/brw_shader.cpp index a1175629dfd..ff77178d752 100644 --- a/src/intel/compiler/brw_shader.cpp +++ b/src/intel/compiler/brw_shader.cpp @@ -183,19 +183,7 @@ brw_abs_immediate(enum brw_reg_type type, struct brw_reg *reg) } bool -backend_reg::equals(const backend_reg &r) const -{ - return brw_regs_equal(this, &r) && offset == r.offset; -} - -bool -backend_reg::negative_equals(const backend_reg &r) const -{ - return brw_regs_negative_equal(this, &r) && offset == r.offset; -} - -bool -backend_reg::is_zero() const +fs_reg::is_zero() const { if (file != IMM) return false; @@ -226,7 +214,7 @@ backend_reg::is_zero() const } bool -backend_reg::is_one() const +fs_reg::is_one() const { if (file != IMM) return false; @@ -257,7 +245,7 @@ backend_reg::is_one() const } bool -backend_reg::is_negative_one() const +fs_reg::is_negative_one() const { if (file != IMM) return false; @@ -285,14 +273,14 @@ backend_reg::is_negative_one() const } bool -backend_reg::is_null() const +fs_reg::is_null() const { return file == ARF && nr == BRW_ARF_NULL; } bool -backend_reg::is_accumulator() const +fs_reg::is_accumulator() const { return file == ARF && nr == BRW_ARF_ACCUMULATOR; }