iris: handle tile case where cso width, height is zero

Patch adds a fallback to calculate_tile_dimensions if such case is hit,
this happened when running CTS tests on simulation.

Fixes: d13c81a2c3 ("iris/xehp: Implement TBIMR tile pass setup and pipeline bandwidth estimation.")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25989>
This commit is contained in:
Tapani Pälli 2023-11-01 11:15:54 +02:00 committed by Marge Bot
parent a19e46f5d0
commit faed5d647f

View file

@ -6369,6 +6369,9 @@ calculate_tile_dimensions(struct iris_context *ice,
struct pipe_framebuffer_state *cso = &ice->state.framebuffer;
if (cso->width == 0 || cso->height == 0)
return false;
for (unsigned i = 0; i < cso->nr_cbufs; i++) {
const struct iris_surface *surf = (void *)cso->cbufs[i];