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ac/cmdbuf: add new slots to ac_tracked_reg

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For RADV registers that aren't tracked in RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38740>
This commit is contained in:
Samuel Pitoiset 2025-12-04 13:18:21 +01:00 • committed by Marge Bot
parent 18bdb76408
commit fad24d6fcc
1 changed files with 23 additions and 2 deletions
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25
src/amd/common/ac_cmdbuf.h
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@ -98,7 +98,8 @@ enum ac_tracked_reg
AC_TRACKED_PA_CL_GB_HORZ_CLIP_ADJ, AC_TRACKED_PA_CL_GB_HORZ_CLIP_ADJ,
AC_TRACKED_PA_CL_GB_HORZ_DISC_ADJ, AC_TRACKED_PA_CL_GB_HORZ_DISC_ADJ,
/* Non-consecutive register */ /* 2 consecutive registers */
AC_TRACKED_SPI_SHADER_IDX_FORMAT,
AC_TRACKED_SPI_SHADER_POS_FORMAT, AC_TRACKED_SPI_SHADER_POS_FORMAT,
/* 5 consecutive registers (GFX12), or 2 consecutive registers (GFX6-11) */ /* 5 consecutive registers (GFX12), or 2 consecutive registers (GFX6-11) */
@ -112,21 +113,30 @@ enum ac_tracked_reg
AC_TRACKED_DB_EQAA, AC_TRACKED_DB_EQAA,
AC_TRACKED_DB_RENDER_OVERRIDE2, AC_TRACKED_DB_RENDER_OVERRIDE2,
AC_TRACKED_DB_SHADER_CONTROL, AC_TRACKED_DB_SHADER_CONTROL,
AC_TRACKED_DB_VRS_OVERRIDE_CNTL,
AC_TRACKED_DB_STENCIL_REF,
AC_TRACKED_DB_ALPHA_TO_MASK,
AC_TRACKED_CB_COLOR_CONTROL,
AC_TRACKED_CB_SHADER_MASK, AC_TRACKED_CB_SHADER_MASK,
AC_TRACKED_CB_TARGET_MASK, AC_TRACKED_CB_TARGET_MASK,
AC_TRACKED_PA_CL_CLIP_CNTL, AC_TRACKED_PA_CL_CLIP_CNTL,
AC_TRACKED_PA_CL_VS_OUT_CNTL, AC_TRACKED_PA_CL_VS_OUT_CNTL,
AC_TRACKED_PA_CL_VTE_CNTL, AC_TRACKED_PA_CL_VTE_CNTL,
AC_TRACKED_PA_CL_VRS_CNTL,
AC_TRACKED_PA_SC_CLIPRECT_RULE, AC_TRACKED_PA_SC_CLIPRECT_RULE,
AC_TRACKED_PA_SC_LINE_STIPPLE, AC_TRACKED_PA_SC_LINE_STIPPLE,
AC_TRACKED_PA_SC_MODE_CNTL_1, AC_TRACKED_PA_SC_MODE_CNTL_1,
AC_TRACKED_PA_SU_HARDWARE_SCREEN_OFFSET, AC_TRACKED_PA_SU_HARDWARE_SCREEN_OFFSET,
AC_TRACKED_PA_SC_SAMPLE_PROPERTIES,
AC_TRACKED_PA_SC_CONSERVATIVE_RASTERIZATION_CNTL,
AC_TRACKED_SPI_PS_IN_CONTROL, AC_TRACKED_SPI_PS_IN_CONTROL,
AC_TRACKED_VGT_GS_INSTANCE_CNT, AC_TRACKED_VGT_GS_INSTANCE_CNT,
AC_TRACKED_VGT_GS_MAX_VERT_OUT, AC_TRACKED_VGT_GS_MAX_VERT_OUT,
AC_TRACKED_VGT_SHADER_STAGES_EN, AC_TRACKED_VGT_SHADER_STAGES_EN,
AC_TRACKED_VGT_LS_HS_CONFIG, AC_TRACKED_VGT_LS_HS_CONFIG,
AC_TRACKED_VGT_TF_PARAM, AC_TRACKED_VGT_TF_PARAM,
AC_TRACKED_VGT_DRAW_PAYLOAD_CNTL,
AC_TRACKED_VGT_MULTI_PRIM_IB_RESET_INDX,
AC_TRACKED_PA_SU_SMALL_PRIM_FILTER_CNTL, /* GFX8-9 (only with has_small_prim_filter_sample_loc_bug) */ AC_TRACKED_PA_SU_SMALL_PRIM_FILTER_CNTL, /* GFX8-9 (only with has_small_prim_filter_sample_loc_bug) */
AC_TRACKED_PA_SC_BINNER_CNTL_0, /* GFX9+ */ AC_TRACKED_PA_SC_BINNER_CNTL_0, /* GFX9+ */
AC_TRACKED_GE_MAX_OUTPUT_PER_SUBGROUP, /* GFX10+ - the SMALL_PRIM_FILTER slot above can be reused */ AC_TRACKED_GE_MAX_OUTPUT_PER_SUBGROUP, /* GFX10+ - the SMALL_PRIM_FILTER slot above can be reused */
@ -169,9 +179,20 @@ enum ac_tracked_reg
AC_TRACKED_CB_DCC_CONTROL, /* GFX8-11 */ AC_TRACKED_CB_DCC_CONTROL, /* GFX8-11 */
AC_TRACKED_DB_STENCIL_READ_MASK, /* GFX12+ */ AC_TRACKED_DB_STENCIL_READ_MASK, /* GFX12+ */
AC_TRACKED_DB_STENCIL_WRITE_MASK, /* GFX12+ */ AC_TRACKED_DB_STENCIL_WRITE_MASK, /* GFX12+ */
AC_TRACKED_PA_SC_HISZ_CONTROL, /* GFX12+ */ AC_TRACKED_PA_SC_SHADER_CONTROL, /* GFX9-10.3 */
AC_TRACKED_PA_SC_HISZ_CONTROL = AC_TRACKED_PA_SC_SHADER_CONTROL, /* GFX12+ (slot reused)*/
AC_TRACKED_PA_SC_LINE_STIPPLE_RESET, /* GFX12+ */ AC_TRACKED_PA_SC_LINE_STIPPLE_RESET, /* GFX12+ */
/* 2 consecutive registers */
AC_TRACKED_DB_STENCILREFMASK, /* GFX6-11.5 */
AC_TRACKED_DB_STENCILREFMASK_BF, /* GFX6-11.5 */
/* 2 consecutive registers */
AC_TRACKED_PA_SC_AA_MASK_X0Y0_X1Y0,
AC_TRACKED_PA_SC_AA_MASK_X0Y1_X1Y1,
AC_TRACKED_UNUSED0, /* To force alignment */
AC_NUM_TRACKED_CONTEXT_REGS, AC_NUM_TRACKED_CONTEXT_REGS,
AC_FIRST_TRACKED_OTHER_REG = AC_NUM_TRACKED_CONTEXT_REGS, AC_FIRST_TRACKED_OTHER_REG = AC_NUM_TRACKED_CONTEXT_REGS,