From fab6f84126305f5c3df91937edc9eb4f468cb483 Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Thu, 2 Apr 2026 13:37:31 +0000 Subject: [PATCH] brw: make the program key available on pass_tracker Signed-off-by: Lionel Landwerlin Part-of: --- src/intel/compiler/brw/brw_compile_bs.cpp | 3 ++- src/intel/compiler/brw/brw_compile_cs.cpp | 3 ++- src/intel/compiler/brw/brw_compile_fs.cpp | 3 ++- src/intel/compiler/brw/brw_compile_gs.cpp | 3 ++- src/intel/compiler/brw/brw_compile_mesh.cpp | 6 ++++-- src/intel/compiler/brw/brw_compile_tcs.cpp | 3 ++- src/intel/compiler/brw/brw_compile_tes.cpp | 3 ++- src/intel/compiler/brw/brw_compile_vs.cpp | 4 ++-- src/intel/compiler/brw/brw_nir.c | 12 +++++------- src/intel/compiler/brw/brw_nir.h | 8 +++----- src/intel/compiler/brw/brw_private.h | 2 ++ 11 files changed, 28 insertions(+), 22 deletions(-) diff --git a/src/intel/compiler/brw/brw_compile_bs.cpp b/src/intel/compiler/brw/brw_compile_bs.cpp index 2e92357019f..6718c8c395b 100644 --- a/src/intel/compiler/brw/brw_compile_bs.cpp +++ b/src/intel/compiler/brw/brw_compile_bs.cpp @@ -87,13 +87,14 @@ compile_single_bs(const struct brw_compiler *compiler, .nir = shader, .dispatch_width = required_width, .compiler = compiler, + .key = &key->base, .archiver = params->base.archiver, }, *pt = &pt_; BRW_NIR_SNAPSHOT("first"); brw_nir_apply_key(pt, &key->base, required_width); - brw_postprocess_nir(pt, debug_enabled, key->base.robust_flags); + brw_postprocess_nir(pt, debug_enabled); const brw_shader_params shader_params = { .compiler = compiler, diff --git a/src/intel/compiler/brw/brw_compile_cs.cpp b/src/intel/compiler/brw/brw_compile_cs.cpp index 5ea2f1ce115..7e295d5372c 100644 --- a/src/intel/compiler/brw/brw_compile_cs.cpp +++ b/src/intel/compiler/brw/brw_compile_cs.cpp @@ -145,11 +145,12 @@ brw_compile_cs(const struct brw_compiler *compiler, .nir = nir, .dispatch_width = 0, .compiler = compiler, + .key = &key->base, .archiver = params->base.archiver, }, *pt = &pt_; BRW_NIR_SNAPSHOT("first"); - brw_postprocess_nir_opts(pt, key->base.robust_flags); + brw_postprocess_nir_opts(pt); brw_simd_selection_state simd_state{ .devinfo = compiler->devinfo, diff --git a/src/intel/compiler/brw/brw_compile_fs.cpp b/src/intel/compiler/brw/brw_compile_fs.cpp index 571d2c7e893..2f290e7caab 100644 --- a/src/intel/compiler/brw/brw_compile_fs.cpp +++ b/src/intel/compiler/brw/brw_compile_fs.cpp @@ -1451,6 +1451,7 @@ brw_compile_fs(const struct brw_compiler *compiler, .nir = nir, .dispatch_width = 0, .compiler = compiler, + .key = &key->base, .archiver = params->base.archiver, }, *pt = &pt_; @@ -1534,7 +1535,7 @@ brw_compile_fs(const struct brw_compiler *compiler, BRW_NIR_PASS(nir_inline_sysval, nir_intrinsic_load_fs_config_intel, f); } - brw_postprocess_nir_opts(pt, key->base.robust_flags); + brw_postprocess_nir_opts(pt); unsigned pressure[SIMD_COUNT]; brw_nir_quick_pressure_estimate(nir, devinfo, pressure); diff --git a/src/intel/compiler/brw/brw_compile_gs.cpp b/src/intel/compiler/brw/brw_compile_gs.cpp index 7f3b559ca80..d888cc4c1a7 100644 --- a/src/intel/compiler/brw/brw_compile_gs.cpp +++ b/src/intel/compiler/brw/brw_compile_gs.cpp @@ -136,6 +136,7 @@ brw_compile_gs(const struct brw_compiler *compiler, .nir = nir, .dispatch_width = dispatch_width, .compiler = compiler, + .key = &key->base, .archiver = params->base.archiver, }, *pt = &pt_; @@ -174,7 +175,7 @@ brw_compile_gs(const struct brw_compiler *compiler, BRW_NIR_SNAPSHOT("after_lower_io"); brw_nir_opt_vectorize_urb(pt); - brw_postprocess_nir(pt, debug_enabled, key->base.robust_flags); + brw_postprocess_nir(pt, debug_enabled); prog_data->include_primitive_id = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_PRIMITIVE_ID); diff --git a/src/intel/compiler/brw/brw_compile_mesh.cpp b/src/intel/compiler/brw/brw_compile_mesh.cpp index 38510232c40..4e502d848e7 100644 --- a/src/intel/compiler/brw/brw_compile_mesh.cpp +++ b/src/intel/compiler/brw/brw_compile_mesh.cpp @@ -285,6 +285,7 @@ brw_compile_task(const struct brw_compiler *compiler, .nir = nir, .dispatch_width = 0, .compiler = compiler, + .key = &key->base, .archiver = params->base.archiver, }, *pt = &pt_; @@ -321,7 +322,7 @@ brw_compile_task(const struct brw_compiler *compiler, prog_data->base.uses_inline_data = brw_nir_uses_inline_data(nir) || key->base.uses_inline_push_addr; - brw_postprocess_nir_opts(pt, key->base.robust_flags); + brw_postprocess_nir_opts(pt); brw_simd_selection_state simd_state{ .devinfo = compiler->devinfo, @@ -983,6 +984,7 @@ brw_compile_mesh(const struct brw_compiler *compiler, .nir = nir, .dispatch_width = 0, .compiler = compiler, + .key = &key->base, .archiver = params->base.archiver, }, *pt = &pt_; @@ -1047,7 +1049,7 @@ brw_compile_mesh(const struct brw_compiler *compiler, prog_data->base.uses_inline_data = brw_nir_uses_inline_data(nir) || key->base.uses_inline_push_addr; - brw_postprocess_nir_opts(pt, key->base.robust_flags); + brw_postprocess_nir_opts(pt); const struct brw_lower_urb_cb_data cb_data = { .devinfo = devinfo, diff --git a/src/intel/compiler/brw/brw_compile_tcs.cpp b/src/intel/compiler/brw/brw_compile_tcs.cpp index f24b8f21eff..2e81ec40264 100644 --- a/src/intel/compiler/brw/brw_compile_tcs.cpp +++ b/src/intel/compiler/brw/brw_compile_tcs.cpp @@ -187,6 +187,7 @@ brw_compile_tcs(const struct brw_compiler *compiler, .nir = nir, .dispatch_width = dispatch_width, .compiler = compiler, + .key = &key->base, .archiver = params->base.archiver, }, *pt = &pt_; @@ -223,7 +224,7 @@ brw_compile_tcs(const struct brw_compiler *compiler, BRW_NIR_PASS(lower_single_patch_invocation_id); } - brw_postprocess_nir(pt, debug_enabled, key->base.robust_flags); + brw_postprocess_nir(pt, debug_enabled); bool has_primitive_id = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_PRIMITIVE_ID); diff --git a/src/intel/compiler/brw/brw_compile_tes.cpp b/src/intel/compiler/brw/brw_compile_tes.cpp index 88c25d6a421..1b6d982ca4c 100644 --- a/src/intel/compiler/brw/brw_compile_tes.cpp +++ b/src/intel/compiler/brw/brw_compile_tes.cpp @@ -77,6 +77,7 @@ brw_compile_tes(const struct brw_compiler *compiler, .nir = nir, .dispatch_width = dispatch_width, .compiler = compiler, + .key = &key->base, .archiver = params->base.archiver, }, *pt = &pt_; @@ -113,7 +114,7 @@ brw_compile_tes(const struct brw_compiler *compiler, brw_nir_opt_vectorize_urb(pt); BRW_NIR_PASS(intel_nir_lower_patch_vertices_tes); - brw_postprocess_nir(pt, debug_enabled, key->base.robust_flags); + brw_postprocess_nir(pt, debug_enabled); BRW_NIR_PASS(brw_nir_lower_deferred_urb_writes, devinfo, &prog_data->base.vue_map, 0, 0); diff --git a/src/intel/compiler/brw/brw_compile_vs.cpp b/src/intel/compiler/brw/brw_compile_vs.cpp index cc1a208a015..1a7733462ac 100644 --- a/src/intel/compiler/brw/brw_compile_vs.cpp +++ b/src/intel/compiler/brw/brw_compile_vs.cpp @@ -66,6 +66,7 @@ brw_compile_vs(const struct brw_compiler *compiler, .nir = nir, .dispatch_width = dispatch_width, .compiler = compiler, + .key = &key->base, .archiver = params->base.archiver, }, *pt = &pt_; @@ -103,8 +104,7 @@ brw_compile_vs(const struct brw_compiler *compiler, if (key->vf_component_packing) nr_packed_regs = brw_nir_pack_vs_input(nir, prog_data); - brw_postprocess_nir(pt, debug_enabled, - key->base.robust_flags); + brw_postprocess_nir(pt, debug_enabled); BRW_NIR_PASS(brw_nir_lower_deferred_urb_writes, compiler->devinfo, &prog_data->base.vue_map, 0, 0); diff --git a/src/intel/compiler/brw/brw_nir.c b/src/intel/compiler/brw/brw_nir.c index 9d3e8591172..8466f638291 100644 --- a/src/intel/compiler/brw/brw_nir.c +++ b/src/intel/compiler/brw/brw_nir.c @@ -2422,8 +2422,7 @@ brw_nir_ssbo_intel(nir_shader *shader) } static void -brw_vectorize_lower_mem_access(brw_pass_tracker *pt, - enum brw_robustness_flags robust_flags) +brw_vectorize_lower_mem_access(brw_pass_tracker *pt) { const struct intel_device_info *devinfo = pt->compiler->devinfo; @@ -2435,9 +2434,9 @@ brw_vectorize_lower_mem_access(brw_pass_tracker *pt, .robust_modes = (nir_variable_mode)0, }; - if (robust_flags & BRW_ROBUSTNESS_UBO) + if (pt->key->robust_flags & BRW_ROBUSTNESS_UBO) options.robust_modes |= nir_var_mem_ubo; - if (robust_flags & BRW_ROBUSTNESS_SSBO) + if (pt->key->robust_flags & BRW_ROBUSTNESS_SSBO) options.robust_modes |= nir_var_mem_ssbo; OPT(nir_opt_load_store_vectorize, &options); @@ -2679,8 +2678,7 @@ brw_nir_lower_int64(brw_pass_tracker *pt) * backend and is highly backend-specific. */ void -brw_postprocess_nir_opts(brw_pass_tracker *pt, - enum brw_robustness_flags robust_flags) +brw_postprocess_nir_opts(brw_pass_tracker *pt) { const struct brw_compiler *compiler = pt->compiler; const struct intel_device_info *devinfo = compiler->devinfo; @@ -2762,7 +2760,7 @@ brw_postprocess_nir_opts(brw_pass_tracker *pt, brw_nir_optimize(pt); } - brw_vectorize_lower_mem_access(pt, robust_flags); + brw_vectorize_lower_mem_access(pt); /* Fence LSC SLM writes to avoid workgroups WaW hazards to the same SLM * location. diff --git a/src/intel/compiler/brw/brw_nir.h b/src/intel/compiler/brw/brw_nir.h index c4b45e565ae..848dd1e0bb4 100644 --- a/src/intel/compiler/brw/brw_nir.h +++ b/src/intel/compiler/brw/brw_nir.h @@ -277,18 +277,16 @@ bool brw_nir_lower_mem_access_bit_sizes(nir_shader *shader, bool brw_nir_lower_simd(nir_shader *nir, unsigned dispatch_width); -void brw_postprocess_nir_opts(struct brw_pass_tracker *pt, - enum brw_robustness_flags robust_flags); +void brw_postprocess_nir_opts(struct brw_pass_tracker *pt); void brw_postprocess_nir_out_of_ssa(struct brw_pass_tracker *pt, bool debug_enabled); static inline void brw_postprocess_nir(struct brw_pass_tracker *pt, - bool debug_enabled, - enum brw_robustness_flags robust_flags) + bool debug_enabled) { - brw_postprocess_nir_opts(pt, robust_flags); + brw_postprocess_nir_opts(pt); brw_postprocess_nir_out_of_ssa(pt, debug_enabled); } diff --git a/src/intel/compiler/brw/brw_private.h b/src/intel/compiler/brw/brw_private.h index 398a5233130..8fda6eb5cb1 100644 --- a/src/intel/compiler/brw/brw_private.h +++ b/src/intel/compiler/brw/brw_private.h @@ -25,6 +25,8 @@ typedef struct brw_pass_tracker { const struct brw_compiler *compiler; + const struct brw_base_prog_key *key; + bool progress; /* Filled with the last line that made progress.