diff --git a/src/freedreno/registers/adreno/a6xx.xml b/src/freedreno/registers/adreno/a6xx.xml index 673137ab496..822dc16396a 100644 --- a/src/freedreno/registers/adreno/a6xx.xml +++ b/src/freedreno/registers/adreno/a6xx.xml @@ -2017,7 +2017,7 @@ by a particular renderpass/blit. Packed array of a6xx_varying_interp_mode - + Packed array of a6xx_varying_ps_repl_mode @@ -2026,7 +2026,7 @@ by a particular renderpass/blit. - + @@ -3645,7 +3645,7 @@ by a particular renderpass/blit. - + diff --git a/src/freedreno/tests/reference/crash.log b/src/freedreno/tests/reference/crash.log index 499db6a8c5f..bf2befe7965 100644 --- a/src/freedreno/tests/reference/crash.log +++ b/src/freedreno/tests/reference/crash.log @@ -6118,20 +6118,20 @@ WARNING: 64b discontinuity (no _LO dword for 890d) 00000000 VPC_VARYING_INTERP_MODE[0x5].MODE: 0 00000000 VPC_VARYING_INTERP_MODE[0x6].MODE: 0 00000000 VPC_VARYING_INTERP_MODE[0x7].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x1].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x2].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x3].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x4].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x5].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x6].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x7].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x1].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x2].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x3].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x4].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x5].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x6].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x7].MODE: 0 00000000 VPC_UNKNOWN_9210: 0 00000000 VPC_UNKNOWN_9211: 0 - 00000000 VPC_VARYING_LM_TRANSFER_CNTL_0[0].DISABLE: 0 - 00000000 VPC_VARYING_LM_TRANSFER_CNTL_0[0x1].DISABLE: 0 - 00000000 VPC_VARYING_LM_TRANSFER_CNTL_0[0x2].DISABLE: 0 - 00000000 VPC_VARYING_LM_TRANSFER_CNTL_0[0x3].DISABLE: 0 + 00000000 VPC_VARYING_LM_TRANSFER_CNTL[0].DISABLE: 0 + 00000000 VPC_VARYING_LM_TRANSFER_CNTL[0x1].DISABLE: 0 + 00000000 VPC_VARYING_LM_TRANSFER_CNTL[0x2].DISABLE: 0 + 00000000 VPC_VARYING_LM_TRANSFER_CNTL[0x3].DISABLE: 0 00000000 VPC_SO_MAPPING_WPTR: { ADDR = 0 } 00000000 VPC_SO_QUERY_BASE: 0 00000000 VPC_SO[0].BUFFER_BASE: 0 @@ -6171,20 +6171,20 @@ WARNING: 64b discontinuity (no _LO dword for 890d) 00000000 VPC_VARYING_INTERP_MODE[0x5].MODE: 0 00000000 VPC_VARYING_INTERP_MODE[0x6].MODE: 0 00000000 VPC_VARYING_INTERP_MODE[0x7].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x1].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x2].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x3].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x4].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x5].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x6].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x7].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x1].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x2].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x3].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x4].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x5].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x6].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x7].MODE: 0 00000000 VPC_UNKNOWN_9210: 0 00000000 VPC_UNKNOWN_9211: 0 - 00000000 VPC_VARYING_LM_TRANSFER_CNTL_0[0].DISABLE: 0 - 00000000 VPC_VARYING_LM_TRANSFER_CNTL_0[0x1].DISABLE: 0 - 00000000 VPC_VARYING_LM_TRANSFER_CNTL_0[0x2].DISABLE: 0 - 00000000 VPC_VARYING_LM_TRANSFER_CNTL_0[0x3].DISABLE: 0 + 00000000 VPC_VARYING_LM_TRANSFER_CNTL[0].DISABLE: 0 + 00000000 VPC_VARYING_LM_TRANSFER_CNTL[0x1].DISABLE: 0 + 00000000 VPC_VARYING_LM_TRANSFER_CNTL[0x2].DISABLE: 0 + 00000000 VPC_VARYING_LM_TRANSFER_CNTL[0x3].DISABLE: 0 00000000 VPC_SO_MAPPING_WPTR: { ADDR = 0 } 00000000 VPC_SO_QUERY_BASE: 0 00000000 VPC_SO[0].BUFFER_BASE: 0 diff --git a/src/freedreno/tests/reference/crash_prefetch.log b/src/freedreno/tests/reference/crash_prefetch.log index af434d8bf68..7ebf181eb6f 100644 --- a/src/freedreno/tests/reference/crash_prefetch.log +++ b/src/freedreno/tests/reference/crash_prefetch.log @@ -2812,10 +2812,10 @@ got cmdszdw=38 !+ 0000ffff VPC_VS_SIV_CNTL: { LAYERLOC = 255 | VIEWLOC = 255 } + 00000000 VPC_UNKNOWN_9107: { 0 } !+ 00000003 VPC_RAST_CNTL: { MODE = POLYMODE6_TRIANGLES } -!+ ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0].DISABLE: 0xffffffff -!+ ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x1].DISABLE: 0xffffffff -!+ ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x2].DISABLE: 0xffffffff -!+ ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x3].DISABLE: 0xffffffff +!+ ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0].DISABLE: 0xffffffff +!+ ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x1].DISABLE: 0xffffffff +!+ ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x2].DISABLE: 0xffffffff +!+ ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x3].DISABLE: 0xffffffff + 00000000 VPC_SO_MAPPING_WPTR: { ADDR = 0 } !+ 00ff0004 VPC_VS_CNTL: { STRIDE_IN_VPC = 4 | POSITIONLOC = 0 | PSIZELOC = 255 | EXTRAPOS = 0 } !+ ff00ff00 VPC_PS_CNTL: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | VIEWIDLOC = 255 } @@ -3530,10 +3530,10 @@ got cmdszdw=38 + 0000ffff VPC_VS_SIV_CNTL: { LAYERLOC = 255 | VIEWLOC = 255 } + 00000000 VPC_UNKNOWN_9107: { 0 } + 00000003 VPC_RAST_CNTL: { MODE = POLYMODE6_TRIANGLES } - + ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0].DISABLE: 0xffffffff - + ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x1].DISABLE: 0xffffffff - + ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x2].DISABLE: 0xffffffff - + ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x3].DISABLE: 0xffffffff + + ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0].DISABLE: 0xffffffff + + ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x1].DISABLE: 0xffffffff + + ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x2].DISABLE: 0xffffffff + + ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x3].DISABLE: 0xffffffff + 00000000 VPC_SO_MAPPING_WPTR: { ADDR = 0 } + 00ff0004 VPC_VS_CNTL: { STRIDE_IN_VPC = 4 | POSITIONLOC = 0 | PSIZELOC = 255 | EXTRAPOS = 0 } + ff00ff00 VPC_PS_CNTL: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | VIEWIDLOC = 255 } @@ -4259,10 +4259,10 @@ got cmdszdw=38 + 0000ffff VPC_VS_SIV_CNTL: { LAYERLOC = 255 | VIEWLOC = 255 } + 00000000 VPC_UNKNOWN_9107: { 0 } + 00000003 VPC_RAST_CNTL: { MODE = POLYMODE6_TRIANGLES } - + ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0].DISABLE: 0xffffffff - + ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x1].DISABLE: 0xffffffff - + ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x2].DISABLE: 0xffffffff - + ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x3].DISABLE: 0xffffffff + + ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0].DISABLE: 0xffffffff + + ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x1].DISABLE: 0xffffffff + + ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x2].DISABLE: 0xffffffff + + ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x3].DISABLE: 0xffffffff + 00000000 VPC_SO_MAPPING_WPTR: { ADDR = 0 } + 00ff0004 VPC_VS_CNTL: { STRIDE_IN_VPC = 4 | POSITIONLOC = 0 | PSIZELOC = 255 | EXTRAPOS = 0 } + ff00ff00 VPC_PS_CNTL: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | VIEWIDLOC = 255 } @@ -4913,10 +4913,10 @@ ESTIMATED CRASH LOCATION! + 0000ffff VPC_VS_SIV_CNTL: { LAYERLOC = 255 | VIEWLOC = 255 } + 00000000 VPC_UNKNOWN_9107: { 0 } + 00000003 VPC_RAST_CNTL: { MODE = POLYMODE6_TRIANGLES } - + ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0].DISABLE: 0xffffffff - + ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x1].DISABLE: 0xffffffff - + ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x2].DISABLE: 0xffffffff - + ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x3].DISABLE: 0xffffffff + + ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0].DISABLE: 0xffffffff + + ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x1].DISABLE: 0xffffffff + + ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x2].DISABLE: 0xffffffff + + ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x3].DISABLE: 0xffffffff + 00000000 VPC_SO_MAPPING_WPTR: { ADDR = 0 } + 00ff0004 VPC_VS_CNTL: { STRIDE_IN_VPC = 4 | POSITIONLOC = 0 | PSIZELOC = 255 | EXTRAPOS = 0 } + ff00ff00 VPC_PS_CNTL: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | VIEWIDLOC = 255 } @@ -17916,20 +17916,20 @@ WARNING: 64b discontinuity (no _LO dword for 890d) 00000000 VPC_VARYING_INTERP_MODE[0x5].MODE: 0 00000000 VPC_VARYING_INTERP_MODE[0x6].MODE: 0 00000000 VPC_VARYING_INTERP_MODE[0x7].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x1].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x2].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x3].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x4].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x5].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x6].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x7].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x1].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x2].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x3].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x4].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x5].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x6].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x7].MODE: 0 00000000 VPC_UNKNOWN_9210: 0 00000000 VPC_UNKNOWN_9211: 0 - ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0].DISABLE: 0xffffffff - ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x1].DISABLE: 0xffffffff - ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x2].DISABLE: 0xffffffff - ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x3].DISABLE: 0xffffffff + ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0].DISABLE: 0xffffffff + ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x1].DISABLE: 0xffffffff + ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x2].DISABLE: 0xffffffff + ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x3].DISABLE: 0xffffffff 00000000 VPC_SO_MAPPING_WPTR: { ADDR = 0 } 00000000 VPC_SO_QUERY_BASE: 0 00000000 VPC_SO[0].BUFFER_BASE: 0 @@ -17969,20 +17969,20 @@ WARNING: 64b discontinuity (no _LO dword for 890d) 00000000 VPC_VARYING_INTERP_MODE[0x5].MODE: 0 00000000 VPC_VARYING_INTERP_MODE[0x6].MODE: 0 00000000 VPC_VARYING_INTERP_MODE[0x7].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x1].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x2].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x3].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x4].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x5].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x6].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x7].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x1].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x2].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x3].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x4].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x5].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x6].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x7].MODE: 0 00000000 VPC_UNKNOWN_9210: 0 00000000 VPC_UNKNOWN_9211: 0 - ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0].DISABLE: 0xffffffff - ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x1].DISABLE: 0xffffffff - ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x2].DISABLE: 0xffffffff - ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x3].DISABLE: 0xffffffff + ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0].DISABLE: 0xffffffff + ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x1].DISABLE: 0xffffffff + ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x2].DISABLE: 0xffffffff + ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x3].DISABLE: 0xffffffff 00000000 VPC_SO_MAPPING_WPTR: { ADDR = 0 } 00000000 VPC_SO_QUERY_BASE: 0 00000000 VPC_SO[0].BUFFER_BASE: 0 diff --git a/src/freedreno/tests/reference/dEQP-VK.draw.indirect_draw.indexed.indirect_draw_count.triangle_list.log b/src/freedreno/tests/reference/dEQP-VK.draw.indirect_draw.indexed.indirect_draw_count.triangle_list.log index 76c319f3d5f..ce1d16b7d66 100644 --- a/src/freedreno/tests/reference/dEQP-VK.draw.indirect_draw.indexed.indirect_draw_count.triangle_list.log +++ b/src/freedreno/tests/reference/dEQP-VK.draw.indirect_draw.indexed.indirect_draw_count.triangle_list.log @@ -909,11 +909,11 @@ cmdstream[0]: 265 dwords VFD_CNTL_5: { REGID_GSHEADER = r63.x | UNK8 = r63.x } VFD_CNTL_6: { 0 } 0000000001054260: 0000: 40a00186 fcfcfc09 0000fcfc fcfcfcfc 000000fc 0000fcfc 00000000 - write VPC_VARYING_LM_TRANSFER_CNTL_0[0].DISABLE (9212) - VPC_VARYING_LM_TRANSFER_CNTL_0[0].DISABLE: 0xfffffff0 - VPC_VARYING_LM_TRANSFER_CNTL_0[0x1].DISABLE: 0xffffffff - VPC_VARYING_LM_TRANSFER_CNTL_0[0x2].DISABLE: 0xffffffff - VPC_VARYING_LM_TRANSFER_CNTL_0[0x3].DISABLE: 0xffffffff + write VPC_VARYING_LM_TRANSFER_CNTL[0].DISABLE (9212) + VPC_VARYING_LM_TRANSFER_CNTL[0].DISABLE: 0xfffffff0 + VPC_VARYING_LM_TRANSFER_CNTL[0x1].DISABLE: 0xffffffff + VPC_VARYING_LM_TRANSFER_CNTL[0x2].DISABLE: 0xffffffff + VPC_VARYING_LM_TRANSFER_CNTL[0x3].DISABLE: 0xffffffff 000000000105427c: 0000: 40921204 fffffff0 ffffffff ffffffff ffffffff opcode: CP_CONTEXT_REG_BUNCH (5c) (5 dwords) VPC_SO_MAPPING_WPTR: { ADDR = 0 } @@ -963,15 +963,15 @@ cmdstream[0]: 265 dwords VPC_VARYING_INTERP_MODE[0x7].MODE: 0 00000000010542fc: 0000: 40920008 00000000 00000000 00000000 00000000 00000000 00000000 00000000 * - write VPC_VARYING_REPLACE_MODE_0[0].MODE (9208) - VPC_VARYING_REPLACE_MODE_0[0].MODE: 0 - VPC_VARYING_REPLACE_MODE_0[0x1].MODE: 0 - VPC_VARYING_REPLACE_MODE_0[0x2].MODE: 0 - VPC_VARYING_REPLACE_MODE_0[0x3].MODE: 0 - VPC_VARYING_REPLACE_MODE_0[0x4].MODE: 0 - VPC_VARYING_REPLACE_MODE_0[0x5].MODE: 0 - VPC_VARYING_REPLACE_MODE_0[0x6].MODE: 0 - VPC_VARYING_REPLACE_MODE_0[0x7].MODE: 0 + write VPC_VARYING_REPLACE_MODE[0].MODE (9208) + VPC_VARYING_REPLACE_MODE[0].MODE: 0 + VPC_VARYING_REPLACE_MODE[0x1].MODE: 0 + VPC_VARYING_REPLACE_MODE[0x2].MODE: 0 + VPC_VARYING_REPLACE_MODE[0x3].MODE: 0 + VPC_VARYING_REPLACE_MODE[0x4].MODE: 0 + VPC_VARYING_REPLACE_MODE[0x5].MODE: 0 + VPC_VARYING_REPLACE_MODE[0x6].MODE: 0 + VPC_VARYING_REPLACE_MODE[0x7].MODE: 0 0000000001054320: 0000: 48920808 00000000 00000000 00000000 00000000 00000000 00000000 00000000 * write SP_PS_INITIAL_TEX_LOAD_CNTL (a99e) @@ -1378,18 +1378,18 @@ cmdstream[0]: 265 dwords + 00000000 VPC_VARYING_INTERP_MODE[0x5].MODE: 0 + 00000000 VPC_VARYING_INTERP_MODE[0x6].MODE: 0 + 00000000 VPC_VARYING_INTERP_MODE[0x7].MODE: 0 - + 00000000 VPC_VARYING_REPLACE_MODE_0[0].MODE: 0 - + 00000000 VPC_VARYING_REPLACE_MODE_0[0x1].MODE: 0 - + 00000000 VPC_VARYING_REPLACE_MODE_0[0x2].MODE: 0 - + 00000000 VPC_VARYING_REPLACE_MODE_0[0x3].MODE: 0 - + 00000000 VPC_VARYING_REPLACE_MODE_0[0x4].MODE: 0 - + 00000000 VPC_VARYING_REPLACE_MODE_0[0x5].MODE: 0 - + 00000000 VPC_VARYING_REPLACE_MODE_0[0x6].MODE: 0 - + 00000000 VPC_VARYING_REPLACE_MODE_0[0x7].MODE: 0 -!+ fffffff0 VPC_VARYING_LM_TRANSFER_CNTL_0[0].DISABLE: 0xfffffff0 -!+ ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x1].DISABLE: 0xffffffff -!+ ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x2].DISABLE: 0xffffffff -!+ ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x3].DISABLE: 0xffffffff + + 00000000 VPC_VARYING_REPLACE_MODE[0].MODE: 0 + + 00000000 VPC_VARYING_REPLACE_MODE[0x1].MODE: 0 + + 00000000 VPC_VARYING_REPLACE_MODE[0x2].MODE: 0 + + 00000000 VPC_VARYING_REPLACE_MODE[0x3].MODE: 0 + + 00000000 VPC_VARYING_REPLACE_MODE[0x4].MODE: 0 + + 00000000 VPC_VARYING_REPLACE_MODE[0x5].MODE: 0 + + 00000000 VPC_VARYING_REPLACE_MODE[0x6].MODE: 0 + + 00000000 VPC_VARYING_REPLACE_MODE[0x7].MODE: 0 +!+ fffffff0 VPC_VARYING_LM_TRANSFER_CNTL[0].DISABLE: 0xfffffff0 +!+ ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x1].DISABLE: 0xffffffff +!+ ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x2].DISABLE: 0xffffffff +!+ ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x3].DISABLE: 0xffffffff + 00000000 VPC_SO_MAPPING_WPTR: { ADDR = 0 } !+ 00ff0408 VPC_VS_CNTL: { STRIDE_IN_VPC = 8 | POSITIONLOC = 4 | PSIZELOC = 255 | EXTRAPOS = 0 } !+ ff01ff04 VPC_PS_CNTL: { NUMNONPOSVAR = 4 | PRIMIDLOC = 255 | VARYING | VIEWIDLOC = 255 } diff --git a/src/freedreno/tests/reference/fd-clouds.log b/src/freedreno/tests/reference/fd-clouds.log index 0f989806e27..f81932dd3f6 100644 --- a/src/freedreno/tests/reference/fd-clouds.log +++ b/src/freedreno/tests/reference/fd-clouds.log @@ -649,11 +649,11 @@ cmdstream[0]: 1023 dwords - shaderdb: 5 cat0, 0 cat1, 0 cat2, 0 cat3, 0 cat4, 0 cat5, 0 cat6, 0 cat7 - shaderdb: 0 sstall, 0 (ss), 0 (sy) 0000000001121044: 0000: 70328003 00620000 01011000 00000000 - write VPC_VARYING_LM_TRANSFER_CNTL_0[0].DISABLE (9212) - VPC_VARYING_LM_TRANSFER_CNTL_0[0].DISABLE: 0xffffffff - VPC_VARYING_LM_TRANSFER_CNTL_0[0x1].DISABLE: 0xffffffff - VPC_VARYING_LM_TRANSFER_CNTL_0[0x2].DISABLE: 0xffffffff - VPC_VARYING_LM_TRANSFER_CNTL_0[0x3].DISABLE: 0xffffffff + write VPC_VARYING_LM_TRANSFER_CNTL[0].DISABLE (9212) + VPC_VARYING_LM_TRANSFER_CNTL[0].DISABLE: 0xffffffff + VPC_VARYING_LM_TRANSFER_CNTL[0x1].DISABLE: 0xffffffff + VPC_VARYING_LM_TRANSFER_CNTL[0x2].DISABLE: 0xffffffff + VPC_VARYING_LM_TRANSFER_CNTL[0x3].DISABLE: 0xffffffff 0000000001121054: 0000: 40921204 ffffffff ffffffff ffffffff ffffffff write SP_VS_OUTPUT[0].REG (a803) SP_VS_OUTPUT[0].REG: { A_REGID = r0.x | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 } @@ -1016,10 +1016,10 @@ cmdstream[0]: 1023 dwords !+ 00000003 VPC_RAST_CNTL: { MODE = POLYMODE6_TRIANGLES } + 00000000 VPC_UNKNOWN_9210: 0 + 00000000 VPC_UNKNOWN_9211: 0 -!+ ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0].DISABLE: 0xffffffff -!+ ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x1].DISABLE: 0xffffffff -!+ ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x2].DISABLE: 0xffffffff -!+ ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x3].DISABLE: 0xffffffff +!+ ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0].DISABLE: 0xffffffff +!+ ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x1].DISABLE: 0xffffffff +!+ ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x2].DISABLE: 0xffffffff +!+ ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x3].DISABLE: 0xffffffff + 00000000 VPC_REPLACE_MODE_CNTL: { 0 } + 00000000 VPC_UNKNOWN_9300: 0 !+ 00ff0004 VPC_VS_CNTL: { STRIDE_IN_VPC = 4 | POSITIONLOC = 0 | PSIZELOC = 255 | EXTRAPOS = 0 } @@ -1937,11 +1937,11 @@ cmdstream[0]: 1023 dwords - shaderdb: 5 cat0, 0 cat1, 0 cat2, 0 cat3, 0 cat4, 0 cat5, 0 cat6, 0 cat7 - shaderdb: 0 sstall, 0 (ss), 0 (sy) 0000000001120044: 0000: 70328003 00620000 01012000 00000000 - write VPC_VARYING_LM_TRANSFER_CNTL_0[0].DISABLE (9212) - VPC_VARYING_LM_TRANSFER_CNTL_0[0].DISABLE: 0xffffffff - VPC_VARYING_LM_TRANSFER_CNTL_0[0x1].DISABLE: 0xffffffff - VPC_VARYING_LM_TRANSFER_CNTL_0[0x2].DISABLE: 0xffffffff - VPC_VARYING_LM_TRANSFER_CNTL_0[0x3].DISABLE: 0xffffffff + write VPC_VARYING_LM_TRANSFER_CNTL[0].DISABLE (9212) + VPC_VARYING_LM_TRANSFER_CNTL[0].DISABLE: 0xffffffff + VPC_VARYING_LM_TRANSFER_CNTL[0x1].DISABLE: 0xffffffff + VPC_VARYING_LM_TRANSFER_CNTL[0x2].DISABLE: 0xffffffff + VPC_VARYING_LM_TRANSFER_CNTL[0x3].DISABLE: 0xffffffff 0000000001120054: 0000: 40921204 ffffffff ffffffff ffffffff ffffffff write SP_VS_OUTPUT[0].REG (a803) SP_VS_OUTPUT[0].REG: { A_REGID = r0.x | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 } @@ -4951,15 +4951,15 @@ cmdstream[0]: 1023 dwords VPC_VARYING_INTERP_MODE[0x7].MODE: 0 0000000001122000: 0000: 40920008 00000000 00000000 00000000 00000000 00000000 00000000 00000000 * - write VPC_VARYING_REPLACE_MODE_0[0].MODE (9208) - VPC_VARYING_REPLACE_MODE_0[0].MODE: 0 - VPC_VARYING_REPLACE_MODE_0[0x1].MODE: 0 - VPC_VARYING_REPLACE_MODE_0[0x2].MODE: 0 - VPC_VARYING_REPLACE_MODE_0[0x3].MODE: 0 - VPC_VARYING_REPLACE_MODE_0[0x4].MODE: 0 - VPC_VARYING_REPLACE_MODE_0[0x5].MODE: 0 - VPC_VARYING_REPLACE_MODE_0[0x6].MODE: 0 - VPC_VARYING_REPLACE_MODE_0[0x7].MODE: 0 + write VPC_VARYING_REPLACE_MODE[0].MODE (9208) + VPC_VARYING_REPLACE_MODE[0].MODE: 0 + VPC_VARYING_REPLACE_MODE[0x1].MODE: 0 + VPC_VARYING_REPLACE_MODE[0x2].MODE: 0 + VPC_VARYING_REPLACE_MODE[0x3].MODE: 0 + VPC_VARYING_REPLACE_MODE[0x4].MODE: 0 + VPC_VARYING_REPLACE_MODE[0x5].MODE: 0 + VPC_VARYING_REPLACE_MODE[0x6].MODE: 0 + VPC_VARYING_REPLACE_MODE[0x7].MODE: 0 0000000001122024: 0000: 48920808 00000000 00000000 00000000 00000000 00000000 00000000 00000000 * group_id: 4 @@ -5225,18 +5225,18 @@ cmdstream[0]: 1023 dwords + 00000000 VPC_VARYING_INTERP_MODE[0x5].MODE: 0 + 00000000 VPC_VARYING_INTERP_MODE[0x6].MODE: 0 + 00000000 VPC_VARYING_INTERP_MODE[0x7].MODE: 0 - + 00000000 VPC_VARYING_REPLACE_MODE_0[0].MODE: 0 - + 00000000 VPC_VARYING_REPLACE_MODE_0[0x1].MODE: 0 - + 00000000 VPC_VARYING_REPLACE_MODE_0[0x2].MODE: 0 - + 00000000 VPC_VARYING_REPLACE_MODE_0[0x3].MODE: 0 - + 00000000 VPC_VARYING_REPLACE_MODE_0[0x4].MODE: 0 - + 00000000 VPC_VARYING_REPLACE_MODE_0[0x5].MODE: 0 - + 00000000 VPC_VARYING_REPLACE_MODE_0[0x6].MODE: 0 - + 00000000 VPC_VARYING_REPLACE_MODE_0[0x7].MODE: 0 - + ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0].DISABLE: 0xffffffff - + ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x1].DISABLE: 0xffffffff - + ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x2].DISABLE: 0xffffffff - + ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x3].DISABLE: 0xffffffff + + 00000000 VPC_VARYING_REPLACE_MODE[0].MODE: 0 + + 00000000 VPC_VARYING_REPLACE_MODE[0x1].MODE: 0 + + 00000000 VPC_VARYING_REPLACE_MODE[0x2].MODE: 0 + + 00000000 VPC_VARYING_REPLACE_MODE[0x3].MODE: 0 + + 00000000 VPC_VARYING_REPLACE_MODE[0x4].MODE: 0 + + 00000000 VPC_VARYING_REPLACE_MODE[0x5].MODE: 0 + + 00000000 VPC_VARYING_REPLACE_MODE[0x6].MODE: 0 + + 00000000 VPC_VARYING_REPLACE_MODE[0x7].MODE: 0 + + ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0].DISABLE: 0xffffffff + + ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x1].DISABLE: 0xffffffff + + ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x2].DISABLE: 0xffffffff + + ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x3].DISABLE: 0xffffffff + 00ff0004 VPC_VS_CNTL: { STRIDE_IN_VPC = 4 | POSITIONLOC = 0 | PSIZELOC = 255 | EXTRAPOS = 0 } + ff00ff00 VPC_PS_CNTL: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | VIEWIDLOC = 255 } + ffffffff PC_RESTART_INDEX: 4294967295 diff --git a/src/freedreno/tests/reference/prefetch-test.log b/src/freedreno/tests/reference/prefetch-test.log index 0b6da69b68e..809217fc925 100644 --- a/src/freedreno/tests/reference/prefetch-test.log +++ b/src/freedreno/tests/reference/prefetch-test.log @@ -3086,18 +3086,18 @@ got cmdszdw=416 + 00000000 VPC_VARYING_INTERP_MODE[0x5].MODE: 0 + 00000000 VPC_VARYING_INTERP_MODE[0x6].MODE: 0 + 00000000 VPC_VARYING_INTERP_MODE[0x7].MODE: 0 - + 00000000 VPC_VARYING_REPLACE_MODE_0[0].MODE: 0 - + 00000000 VPC_VARYING_REPLACE_MODE_0[0x1].MODE: 0 - + 00000000 VPC_VARYING_REPLACE_MODE_0[0x2].MODE: 0 - + 00000000 VPC_VARYING_REPLACE_MODE_0[0x3].MODE: 0 - + 00000000 VPC_VARYING_REPLACE_MODE_0[0x4].MODE: 0 - + 00000000 VPC_VARYING_REPLACE_MODE_0[0x5].MODE: 0 - + 00000000 VPC_VARYING_REPLACE_MODE_0[0x6].MODE: 0 - + 00000000 VPC_VARYING_REPLACE_MODE_0[0x7].MODE: 0 -!+ fffffffc VPC_VARYING_LM_TRANSFER_CNTL_0[0].DISABLE: 0xfffffffc -!+ ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x1].DISABLE: 0xffffffff -!+ ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x2].DISABLE: 0xffffffff -!+ ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x3].DISABLE: 0xffffffff + + 00000000 VPC_VARYING_REPLACE_MODE[0].MODE: 0 + + 00000000 VPC_VARYING_REPLACE_MODE[0x1].MODE: 0 + + 00000000 VPC_VARYING_REPLACE_MODE[0x2].MODE: 0 + + 00000000 VPC_VARYING_REPLACE_MODE[0x3].MODE: 0 + + 00000000 VPC_VARYING_REPLACE_MODE[0x4].MODE: 0 + + 00000000 VPC_VARYING_REPLACE_MODE[0x5].MODE: 0 + + 00000000 VPC_VARYING_REPLACE_MODE[0x6].MODE: 0 + + 00000000 VPC_VARYING_REPLACE_MODE[0x7].MODE: 0 +!+ fffffffc VPC_VARYING_LM_TRANSFER_CNTL[0].DISABLE: 0xfffffffc +!+ ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x1].DISABLE: 0xffffffff +!+ ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x2].DISABLE: 0xffffffff +!+ ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x3].DISABLE: 0xffffffff !+ 00ff0206 VPC_VS_CNTL: { STRIDE_IN_VPC = 6 | POSITIONLOC = 2 | PSIZELOC = 255 | EXTRAPOS = 0 } !+ ff01ff02 VPC_PS_CNTL: { NUMNONPOSVAR = 2 | PRIMIDLOC = 255 | VARYING | VIEWIDLOC = 255 } !+ 00000000 VPC_SO_OVERRIDE: { 0 } @@ -152395,20 +152395,20 @@ WARNING: 64b discontinuity (no _LO dword for 890d) 00000000 VPC_VARYING_INTERP_MODE[0x5].MODE: 0 00000000 VPC_VARYING_INTERP_MODE[0x6].MODE: 0 00000000 VPC_VARYING_INTERP_MODE[0x7].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x1].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x2].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x3].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x4].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x5].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x6].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x7].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x1].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x2].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x3].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x4].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x5].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x6].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x7].MODE: 0 00000000 VPC_UNKNOWN_9210: 0 00000000 VPC_UNKNOWN_9211: 0 - fffffffc VPC_VARYING_LM_TRANSFER_CNTL_0[0].DISABLE: 0xfffffffc - ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x1].DISABLE: 0xffffffff - ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x2].DISABLE: 0xffffffff - ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x3].DISABLE: 0xffffffff + fffffffc VPC_VARYING_LM_TRANSFER_CNTL[0].DISABLE: 0xfffffffc + ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x1].DISABLE: 0xffffffff + ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x2].DISABLE: 0xffffffff + ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x3].DISABLE: 0xffffffff 00000000 VPC_SO_MAPPING_WPTR: { ADDR = 0 } 00000000 VPC_SO_QUERY_BASE: 0 00000000 VPC_SO[0].BUFFER_BASE: 0 @@ -152448,20 +152448,20 @@ WARNING: 64b discontinuity (no _LO dword for 890d) 00000000 VPC_VARYING_INTERP_MODE[0x5].MODE: 0 00000000 VPC_VARYING_INTERP_MODE[0x6].MODE: 0 00000000 VPC_VARYING_INTERP_MODE[0x7].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x1].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x2].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x3].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x4].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x5].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x6].MODE: 0 - 00000000 VPC_VARYING_REPLACE_MODE_0[0x7].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x1].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x2].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x3].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x4].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x5].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x6].MODE: 0 + 00000000 VPC_VARYING_REPLACE_MODE[0x7].MODE: 0 00000000 VPC_UNKNOWN_9210: 0 00000000 VPC_UNKNOWN_9211: 0 - fffffffc VPC_VARYING_LM_TRANSFER_CNTL_0[0].DISABLE: 0xfffffffc - ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x1].DISABLE: 0xffffffff - ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x2].DISABLE: 0xffffffff - ffffffff VPC_VARYING_LM_TRANSFER_CNTL_0[0x3].DISABLE: 0xffffffff + fffffffc VPC_VARYING_LM_TRANSFER_CNTL[0].DISABLE: 0xfffffffc + ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x1].DISABLE: 0xffffffff + ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x2].DISABLE: 0xffffffff + ffffffff VPC_VARYING_LM_TRANSFER_CNTL[0x3].DISABLE: 0xffffffff 00000000 VPC_SO_MAPPING_WPTR: { ADDR = 0 } 00000000 VPC_SO_QUERY_BASE: 0 00000000 VPC_SO[0].BUFFER_BASE: 0 diff --git a/src/freedreno/vulkan/tu_clear_blit.cc b/src/freedreno/vulkan/tu_clear_blit.cc index 4bbd894192b..d1abfa09222 100644 --- a/src/freedreno/vulkan/tu_clear_blit.cc +++ b/src/freedreno/vulkan/tu_clear_blit.cc @@ -888,7 +888,7 @@ r3d_common(struct tu_cmd_buffer *cmd, struct tu_cs *cs, enum r3d_type type, /* REPL_MODE for varying with RECTLIST (2 vertices only) */ tu_cs_emit_regs(cs, A6XX_VPC_VARYING_INTERP_MODE_MODE(0, 0)); - tu_cs_emit_regs(cs, A6XX_VPC_VARYING_REPLACE_MODE_0_MODE(0, 2 << 2 | 1 << 0)); + tu_cs_emit_regs(cs, A6XX_VPC_VARYING_REPLACE_MODE_MODE(0, 2 << 2 | 1 << 0)); tu6_emit_vs(cs, vs, 0); tu6_emit_hs(cs, NULL); diff --git a/src/freedreno/vulkan/tu_cmd_buffer.cc b/src/freedreno/vulkan/tu_cmd_buffer.cc index 1d867e8a57d..10cf390631b 100644 --- a/src/freedreno/vulkan/tu_cmd_buffer.cc +++ b/src/freedreno/vulkan/tu_cmd_buffer.cc @@ -6117,7 +6117,7 @@ tu7_emit_shared_preamble_consts( const struct tu_push_constant_range *shared_consts, uint32_t *push_constants) { - tu_cs_emit_pkt4(cs, REG_A7XX_SP_SHARED_CONSTANT_GFX_0(shared_consts->lo_dwords), + tu_cs_emit_pkt4(cs, REG_A7XX_SP_SHARED_CONSTANT_GFX(shared_consts->lo_dwords), shared_consts->dwords); tu_cs_emit_array(cs, push_constants + shared_consts->lo_dwords, shared_consts->dwords); diff --git a/src/freedreno/vulkan/tu_pipeline.cc b/src/freedreno/vulkan/tu_pipeline.cc index d3c73aee928..5985cedd546 100644 --- a/src/freedreno/vulkan/tu_pipeline.cc +++ b/src/freedreno/vulkan/tu_pipeline.cc @@ -791,7 +791,7 @@ tu6_emit_vpc_varying_modes(struct tu_cs *cs, tu_cs_emit_pkt4(cs, REG_A6XX_VPC_VARYING_INTERP_MODE_MODE(0), interp_regs); tu_cs_emit_array(cs, interp_modes, interp_regs); - tu_cs_emit_pkt4(cs, REG_A6XX_VPC_VARYING_REPLACE_MODE_0_MODE(0), interp_regs); + tu_cs_emit_pkt4(cs, REG_A6XX_VPC_VARYING_REPLACE_MODE_MODE(0), interp_regs); tu_cs_emit_array(cs, ps_repl_modes, interp_regs); } } diff --git a/src/freedreno/vulkan/tu_shader.cc b/src/freedreno/vulkan/tu_shader.cc index b0af380bc0e..c069e743dc8 100644 --- a/src/freedreno/vulkan/tu_shader.cc +++ b/src/freedreno/vulkan/tu_shader.cc @@ -865,7 +865,7 @@ tu_lower_io(nir_shader *shader, struct tu_device *dev, /* Disable pushing constants for this stage if none were loaded in the * shader. If all stages don't load their declared push constants, as * is often the case under zink, then we could additionally skip - * emitting REG_A7XX_SP_SHARED_CONSTANT_GFX_0 entirely. + * emitting REG_A7XX_SP_SHARED_CONSTANT_GFX entirely. */ if (!shader_uses_push_consts(shader)) const_state->push_consts = (struct tu_push_constant_range) {}; @@ -1894,7 +1894,7 @@ tu6_emit_fs_inputs(struct tu_cs *cs, const struct ir3_shader_variant *fs) } } - tu_cs_emit_pkt4(cs, REG_A6XX_VPC_VARYING_LM_TRANSFER_CNTL_0_DISABLE(0), 4); + tu_cs_emit_pkt4(cs, REG_A6XX_VPC_VARYING_LM_TRANSFER_CNTL_DISABLE(0), 4); tu_cs_emit(cs, ~varmask[0]); tu_cs_emit(cs, ~varmask[1]); tu_cs_emit(cs, ~varmask[2]); diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_program.cc b/src/gallium/drivers/freedreno/a6xx/fd6_program.cc index a15e3a76b7b..7ae68c07af1 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_program.cc +++ b/src/gallium/drivers/freedreno/a6xx/fd6_program.cc @@ -652,7 +652,7 @@ emit_vpc(struct fd_ringbuffer *ring, const struct program_builder *b) emit_vs_system_values(ring, b); - OUT_PKT4(ring, REG_A6XX_VPC_VARYING_LM_TRANSFER_CNTL_0_DISABLE(0), 4); + OUT_PKT4(ring, REG_A6XX_VPC_VARYING_LM_TRANSFER_CNTL_DISABLE(0), 4); OUT_RING(ring, ~linkage.varmask[0]); OUT_RING(ring, ~linkage.varmask[1]); OUT_RING(ring, ~linkage.varmask[2]); @@ -1376,9 +1376,9 @@ emit_interp_state(struct fd_ringbuffer *ring, const struct fd6_program_state *st for (int i = 0; i < 8; i++) OUT_RING(ring, vinterp[i]); /* VPC_VARYING_INTERP_MODE[i].MODE */ - OUT_PKT4(ring, REG_A6XX_VPC_VARYING_REPLACE_MODE_0_MODE(0), 8); + OUT_PKT4(ring, REG_A6XX_VPC_VARYING_REPLACE_MODE_MODE(0), 8); for (int i = 0; i < 8; i++) - OUT_RING(ring, vpsrepl[i]); /* VPC_VARYING_REPLACE_MODE_0[i] */ + OUT_RING(ring, vpsrepl[i]); /* VPC_VARYING_REPLACE_MODE[i] */ } template