From fa3d2bc486b95be7f6d5757b692d7ee62c6ebca1 Mon Sep 17 00:00:00 2001
From: Christian Gmeiner <cgmeiner@igalia.com>
Date: Thu, 29 Feb 2024 14:02:12 +0100
Subject: [PATCH] etnaviv: isa: Add texldd opcode

Encoded instruction is taken from blob running:
- dEQP-GLES3.functional.shaders.texture_functions.texturegrad.sampler2d_float_vertex

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27871>
---
 src/etnaviv/isa/etnaviv.xml      | 6 +++++-
 src/etnaviv/isa/tests/disasm.cpp | 1 +
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/src/etnaviv/isa/etnaviv.xml b/src/etnaviv/isa/etnaviv.xml
index 46f909ce0a2..5841f9aa06d 100644
--- a/src/etnaviv/isa/etnaviv.xml
+++ b/src/etnaviv/isa/etnaviv.xml
@@ -986,6 +986,11 @@ SPDX-License-Identifier: MIT
 	<pattern pos="80">0</pattern> <!-- OPCODE_BIT6 -->
 </bitset>
 
+<bitset name="texldd" extends="#instruction-tex-src0-src1-src2">
+	<pattern low="0" high="5">011010</pattern> <!-- OPC -->
+	<pattern pos="80">0</pattern> <!-- OPCODE_BIT6 -->
+</bitset>
+
 <bitset name="texldl" extends="#instruction-tex-src0">
 	<pattern low="0" high="5">011011</pattern> <!-- OPC -->
 	<pattern pos="80">0</pattern> <!-- OPCODE_BIT6 -->
@@ -993,7 +998,6 @@ SPDX-License-Identifier: MIT
 
 <!-- 0x7800000f 0x9011007c 0x00200804 0x0100100c -->
 
-<!-- texldd -->
 <!-- texldpcf -->
 <!-- rep -->
 <!-- endrep -->
diff --git a/src/etnaviv/isa/tests/disasm.cpp b/src/etnaviv/isa/tests/disasm.cpp
index 00539de48e4..f8e5e6854ae 100644
--- a/src/etnaviv/isa/tests/disasm.cpp
+++ b/src/etnaviv/isa/tests/disasm.cpp
@@ -113,6 +113,7 @@ INSTANTIATE_TEST_SUITE_P(Opcodes, DisasmTest,
       disasm_state{ {0x00000057, 0x00002800, 0x00000040, 0x00000002}, "texkill.gt.pack   void, t2.xxxx, u0.xxxx, void\n" },
       disasm_state{ {0x07811018, 0x15001f20, 0x00000000, 0x00000000}, "texld.xyzw        t1, tex0, t1.xyyy, void, void\n" },
       disasm_state{ {0x07811019, 0x39002f20, 0x00000000, 0x00000000}, "texldb.xyzw       t1, tex0, t2.xyzw, void, void\n" },
+      disasm_state{ {0x0781101a, 0x15001f20, 0x00a80140, 0x003f8018}, "texldd.xyzw       t1, tex0, t1.xyyy, t1.xyyy, t1.zwww\n" },
       disasm_state{ {0x4781101b, 0x39003f20, 0x00000000, 0x00000000}, "texldl.xyzw       t1, tex8, t3.xyzw, void, void\n" },
       disasm_state{ {0x00801021, 0x00000004, 0x00000000, 0x00000008}, "sqrt              t0.x___, void, void, t0.xxxx\n" },
       disasm_state{ {0x03001022, 0x00000005, 0x00000000, 0x00154008}, "sin.rtz           t0.zy, void, void, t0.yyyy\n" },