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vc4: Add a helper for changing a field in an instruction.
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8e18adea61
commit
f96bd9673e
2 changed files with 12 additions and 11 deletions
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@ -32,15 +32,13 @@ set_src_raddr(uint64_t inst, struct qpu_reg src)
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if (src.mux == QPU_MUX_A) {
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assert(QPU_GET_FIELD(inst, QPU_RADDR_A) == QPU_R_NOP ||
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QPU_GET_FIELD(inst, QPU_RADDR_A) == src.addr);
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return ((inst & ~QPU_RADDR_A_MASK) |
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QPU_SET_FIELD(src.addr, QPU_RADDR_A));
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return QPU_UPDATE_FIELD(inst, src.addr, QPU_RADDR_A);
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}
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if (src.mux == QPU_MUX_B) {
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assert(QPU_GET_FIELD(inst, QPU_RADDR_B) == QPU_R_NOP ||
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QPU_GET_FIELD(inst, QPU_RADDR_B) == src.addr);
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return ((inst & ~QPU_RADDR_B_MASK) |
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QPU_SET_FIELD(src.addr, QPU_RADDR_B));
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return QPU_UPDATE_FIELD(inst, src.addr, QPU_RADDR_B);
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}
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return inst;
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@ -330,8 +328,8 @@ try_swap_ra_file(uint64_t *merge, uint64_t *a, uint64_t *b)
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/* Move raddr A to B in instruction a. */
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*a = (*a & ~QPU_RADDR_A_MASK) | QPU_SET_FIELD(QPU_R_NOP, QPU_RADDR_A);
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*a = (*a & ~QPU_RADDR_B_MASK) | QPU_SET_FIELD(raddr_a_a, QPU_RADDR_B);
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*merge = ((*merge & ~QPU_RADDR_A_MASK) | QPU_SET_FIELD(raddr_b_a, QPU_RADDR_A));
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*merge = ((*merge & ~QPU_RADDR_B_MASK) | QPU_SET_FIELD(raddr_a_a, QPU_RADDR_B));
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*merge = QPU_UPDATE_FIELD(*merge, raddr_b_a, QPU_RADDR_A);
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*merge = QPU_UPDATE_FIELD(*merge, raddr_a_a, QPU_RADDR_B);
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swap_ra_file_mux_helper(merge, a, QPU_ADD_A_SHIFT);
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swap_ra_file_mux_helper(merge, a, QPU_ADD_B_SHIFT);
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swap_ra_file_mux_helper(merge, a, QPU_MUL_A_SHIFT);
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@ -415,21 +413,21 @@ uint64_t
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qpu_set_sig(uint64_t inst, uint32_t sig)
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{
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assert(QPU_GET_FIELD(inst, QPU_SIG) == QPU_SIG_NONE);
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return (inst & ~QPU_SIG_MASK) | QPU_SET_FIELD(sig, QPU_SIG);
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return QPU_UPDATE_FIELD(inst, sig, QPU_SIG);
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}
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uint64_t
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qpu_set_cond_add(uint64_t inst, uint32_t sig)
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qpu_set_cond_add(uint64_t inst, uint32_t cond)
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{
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assert(QPU_GET_FIELD(inst, QPU_COND_ADD) == QPU_COND_ALWAYS);
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return (inst & ~QPU_COND_ADD_MASK) | QPU_SET_FIELD(sig, QPU_COND_ADD);
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return QPU_UPDATE_FIELD(inst, cond, QPU_COND_ADD);
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}
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uint64_t
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qpu_set_cond_mul(uint64_t inst, uint32_t sig)
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qpu_set_cond_mul(uint64_t inst, uint32_t cond)
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{
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assert(QPU_GET_FIELD(inst, QPU_COND_MUL) == QPU_COND_ALWAYS);
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return (inst & ~QPU_COND_MUL_MASK) | QPU_SET_FIELD(sig, QPU_COND_MUL);
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return QPU_UPDATE_FIELD(inst, cond, QPU_COND_MUL);
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}
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bool
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@ -217,6 +217,9 @@ enum qpu_unpack {
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#define QPU_GET_FIELD(word, field) ((uint32_t)(((word) & field ## _MASK) >> field ## _SHIFT))
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#define QPU_UPDATE_FIELD(inst, value, field) \
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(((inst) & ~(field ## _MASK)) | QPU_SET_FIELD(value, field))
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#define QPU_SIG_SHIFT 60
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#define QPU_SIG_MASK QPU_MASK(63, 60)
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