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r600g: fix up CP DMA for VM on cayman and TN

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Need to add the virtual address.

Reviewed-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2013-01-25 18:42:27 -05:00
parent c1d35aece0
commit f951f2f52c
2 changed files with 9 additions and 6 deletions
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4
src/gallium/drivers/r600/r600.h
View file

@ -172,8 +172,8 @@ void r600_context_streamout_end(struct r600_context *ctx);
void r600_need_cs_space(struct r600_context *ctx, unsigned num_dw, boolean count_draw_in);
void r600_context_block_emit_dirty(struct r600_context *ctx, struct r600_block *block, unsigned pkt_flags);
void r600_cp_dma_copy_buffer(struct r600_context *rctx,
struct pipe_resource *dst, unsigned dst_offset,
struct pipe_resource *src, unsigned src_offset,
struct pipe_resource *dst, unsigned long dst_offset,
struct pipe_resource *src, unsigned long src_offset,
unsigned size);
int evergreen_context_init(struct r600_context *ctx);

11
src/gallium/drivers/r600/r600_hw_context.c
View file

@ -1065,8 +1065,8 @@ void r600_context_streamout_end(struct r600_context *ctx)
#define CP_DMA_MAX_BYTE_COUNT ((1 << 21) - 8)
void r600_cp_dma_copy_buffer(struct r600_context *rctx,
struct pipe_resource *dst, unsigned dst_offset,
struct pipe_resource *src, unsigned src_offset,
struct pipe_resource *dst, unsigned long dst_offset,
struct pipe_resource *src, unsigned long src_offset,
unsigned size)
{
struct radeon_winsys_cs *cs = rctx->cs;
@ -1079,6 +1079,9 @@ void r600_cp_dma_copy_buffer(struct r600_context *rctx,
return;
}
dst_offset += r600_resource_va(&rctx->screen->screen, dst);
src_offset += r600_resource_va(&rctx->screen->screen, src);
/* We flush the caches, because we might read from or write
* to resources which are bound right now. */
rctx->flags |= R600_CONTEXT_INVAL_READ_CACHES |
@ -1112,9 +1115,9 @@ void r600_cp_dma_copy_buffer(struct r600_context *rctx,
r600_write_value(cs, PKT3(PKT3_CP_DMA, 4, 0));
r600_write_value(cs, src_offset); /* SRC_ADDR_LO [31:0] */
r600_write_value(cs, sync); /* CP_SYNC [31] | SRC_ADDR_HI [7:0] */
r600_write_value(cs, sync | ((src_offset >> 32) & 0xff)); /* CP_SYNC [31] | SRC_ADDR_HI [7:0] */
r600_write_value(cs, dst_offset); /* DST_ADDR_LO [31:0] */
r600_write_value(cs, 0); /* DST_ADDR_HI [7:0] */
r600_write_value(cs, (dst_offset >> 32) & 0xff); /* DST_ADDR_HI [7:0] */
r600_write_value(cs, byte_count); /* COMMAND [29:22] | BYTE_COUNT [20:0] */
r600_write_value(cs, PKT3(PKT3_NOP, 0, 0));