diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp
index 78d2137fff6..34cad69b868 100644
--- a/src/amd/compiler/aco_instruction_selection.cpp
+++ b/src/amd/compiler/aco_instruction_selection.cpp
@@ -11215,7 +11215,9 @@ void ngg_emit_sendmsg_gs_alloc_req(isel_context *ctx, Temp vtx_cnt, Temp prm_cnt
    bld.sopp(aco_opcode::s_sendmsg, bld.m0(tmp), -1, sendmsg_gs_alloc_req);
 
    if (prm_cnt_0.id()) {
-      /* Navi 1x workaround: export a zero-area triangle when GS has no output. */
+      /* Navi 1x workaround: export a triangle with NaN coordinates when GS has no output.
+       * It can't have all-zero positions because that would render an undesired pixel with conservative rasterization.
+       */
       Temp first_lane = bld.sop1(Builder::s_ff1_i32, bld.def(s1), Operand(exec, bld.lm));
       Temp cond = bld.sop2(Builder::s_lshl, bld.def(bld.lm), bld.def(s1, scc),
                            Operand(1u, ctx->program->wave_size == 64), first_lane);
@@ -11226,11 +11228,15 @@ void ngg_emit_sendmsg_gs_alloc_req(isel_context *ctx, Temp vtx_cnt, Temp prm_cnt
       bld.reset(ctx->block);
       ctx->block->kind |= block_kind_export_end;
 
+      /* Use zero: means that it's a triangle whose every vertex index is 0. */
       Temp zero = bld.copy(bld.def(v1), Operand(0u));
+      /* Use NaN for the coordinates, so that the rasterizer allways culls it.  */
+      Temp nan_coord = bld.copy(bld.def(v1), Operand(-1u));
+
       bld.exp(aco_opcode::exp, zero, Operand(v1), Operand(v1), Operand(v1),
         1 /* enabled mask */, V_008DFC_SQ_EXP_PRIM /* dest */,
         false /* compressed */, true /* done */, false /* valid mask */);
-      bld.exp(aco_opcode::exp, zero, zero, zero, zero,
+      bld.exp(aco_opcode::exp, nan_coord, nan_coord, nan_coord, nan_coord,
         0xf /* enabled mask */, V_008DFC_SQ_EXP_POS /* dest */,
         false /* compressed */, true /* done */, true /* valid mask */);