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radeon/winsys: add uvd ring support to winsys v3

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Separated from UVD patch for clarity.

v2: sync with next tree for 3.10
v3: as pointed out by Andreas Bool check for drm minor >= 32

http://cgit.freedesktop.org/~agd5f/linux/log/?h=drm-next-3.10-wip

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Andreas Boll <andreas.boll.dev@gmail.com>
This commit is contained in:
Christian König 2013-04-08 16:41:01 +02:00
parent cb12bf7606
commit f91e4d2c9d
3 changed files with 31 additions and 0 deletions
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11
src/gallium/winsys/radeon/drm/radeon_drm_cs.c
View file

@ -94,6 +94,10 @@
#define RADEON_CS_RING_DMA 2
#endif
#ifndef RADEON_CS_RING_UVD
#define RADEON_CS_RING_UVD 3
#endif
#ifndef RADEON_CS_END_OF_FRAME
#define RADEON_CS_END_OF_FRAME 0x04
#endif
@ -490,6 +494,13 @@ static void radeon_drm_cs_flush(struct radeon_winsys_cs *rcs, unsigned flags)
cs->cst->flags[0] |= RADEON_CS_USE_VM;
}
break;
case RING_UVD:
cs->cst->flags[0] = 0;
cs->cst->flags[1] = RADEON_CS_RING_UVD;
cs->cst->cs.num_chunks = 3;
break;
default:
case RING_GFX:
cs->cst->flags[0] = 0;

17
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
View file

@ -90,6 +90,14 @@
#define RADEON_INFO_TIMESTAMP 0x11
#endif
#ifndef RADEON_INFO_RING_WORKING
#define RADEON_INFO_RING_WORKING 0x15
#endif
#ifndef RADEON_CS_RING_UVD
#define RADEON_CS_RING_UVD 3
#endif
static struct util_hash_table *fd_tab = NULL;
/* Enable/disable feature access for one command stream.
@ -323,6 +331,15 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
ws->info.r600_has_dma = TRUE;
}
/* Check for UVD */
ws->info.has_uvd = FALSE;
if (ws->info.drm_minor >= 32) {
uint32_t value = RADEON_CS_RING_UVD;
if (radeon_get_drm_value(ws->fd, RADEON_INFO_RING_WORKING,
"UVD Ring working", &value))
ws->info.has_uvd = value;
}
/* Get GEM info. */
retval = drmCommandWriteRead(ws->fd, DRM_RADEON_GEM_INFO,
&gem_info, sizeof(gem_info));

3
src/gallium/winsys/radeon/drm/radeon_winsys.h
View file

@ -142,6 +142,7 @@ enum chip_class {
enum ring_type {
RING_GFX = 0,
RING_DMA,
RING_UVD,
RING_LAST,
};
@ -170,6 +171,8 @@ struct radeon_info {
uint32_t drm_minor;
uint32_t drm_patchlevel;
boolean has_uvd;
uint32_t r300_num_gb_pipes;
uint32_t r300_num_z_pipes;