radeonsi: replace llvm es output with nir lowering

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16788>
This commit is contained in:
Qiang Yu 2022-05-30 15:03:40 +08:00
parent 109eb378e5
commit f8ddee90ca
2 changed files with 10 additions and 51 deletions

View file

@ -1510,6 +1510,10 @@ static bool si_lower_io_to_mem(struct si_shader *shader, nir_shader *nir,
NIR_PASS_V(nir, ac_nir_lower_ls_outputs_to_mem, si_map_io_driver_location,
key->ge.opt.same_patch_vertices, tcs_vgpr_only_inputs);
return true;
} else if (key->ge.as_es) {
NIR_PASS_V(nir, ac_nir_lower_es_outputs_to_mem, si_map_io_driver_location,
sel->screen->info.gfx_level, sel->info.esgs_itemsize);
return true;
}
} else if (nir->info.stage == MESA_SHADER_TESS_CTRL) {
NIR_PASS_V(nir, ac_nir_lower_hs_inputs_to_mem, si_map_io_driver_location,
@ -1528,6 +1532,12 @@ static bool si_lower_io_to_mem(struct si_shader *shader, nir_shader *nir,
return true;
} else if (nir->info.stage == MESA_SHADER_TESS_EVAL) {
NIR_PASS_V(nir, ac_nir_lower_tes_inputs_to_mem, si_map_io_driver_location);
if (key->ge.as_es) {
NIR_PASS_V(nir, ac_nir_lower_es_outputs_to_mem, si_map_io_driver_location,
sel->screen->info.gfx_level, sel->info.esgs_itemsize);
}
return true;
}

View file

@ -137,57 +137,6 @@ static void si_set_es_return_value_for_gs(struct si_shader_context *ctx)
void si_llvm_es_build_end(struct si_shader_context *ctx)
{
struct si_shader *es = ctx->shader;
struct si_shader_info *info = &es->selector->info;
LLVMValueRef *addrs = ctx->abi.outputs;
LLVMValueRef lds_base = NULL;
unsigned chan;
int i;
if (ctx->screen->info.gfx_level >= GFX9 && info->num_outputs) {
unsigned itemsize_dw = es->selector->info.esgs_itemsize / 4;
LLVMValueRef vertex_idx = ac_get_thread_id(&ctx->ac);
LLVMValueRef wave_idx = si_unpack_param(ctx, ctx->args.merged_wave_info, 24, 4);
vertex_idx =
LLVMBuildOr(ctx->ac.builder, vertex_idx,
LLVMBuildMul(ctx->ac.builder, wave_idx,
LLVMConstInt(ctx->ac.i32, ctx->ac.wave_size, false), ""),
"");
lds_base =
LLVMBuildMul(ctx->ac.builder, vertex_idx, LLVMConstInt(ctx->ac.i32, itemsize_dw, 0), "");
}
for (i = 0; i < info->num_outputs; i++) {
int param;
if (info->output_semantic[i] == VARYING_SLOT_VIEWPORT ||
info->output_semantic[i] == VARYING_SLOT_LAYER)
continue;
param = si_shader_io_get_unique_index(info->output_semantic[i], false);
for (chan = 0; chan < 4; chan++) {
if (!(info->output_usagemask[i] & (1 << chan)))
continue;
LLVMValueRef out_val = LLVMBuildLoad(ctx->ac.builder, addrs[4 * i + chan], "");
out_val = ac_to_integer(&ctx->ac, out_val);
/* GFX9 has the ESGS ring in LDS. */
if (ctx->screen->info.gfx_level >= GFX9) {
LLVMValueRef idx = LLVMConstInt(ctx->ac.i32, param * 4 + chan, false);
idx = LLVMBuildAdd(ctx->ac.builder, lds_base, idx, "");
ac_build_indexed_store(&ctx->ac, ctx->esgs_ring, idx, out_val);
continue;
}
ac_build_buffer_store_dword(&ctx->ac, ctx->esgs_ring, out_val, NULL,
LLVMConstInt(ctx->ac.i32, (4 * param + chan) * 4, 0),
ac_get_arg(&ctx->ac, ctx->args.es2gs_offset),
ac_glc | ac_slc | ac_swizzled);
}
}
if (ctx->screen->info.gfx_level >= GFX9)
si_set_es_return_value_for_gs(ctx);
}