amd: add support for gfx1036 and gfx1037 chips

Both are identified as GFX1036 for simplicity.

Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Tested-by: Yifan Zhang <yifan1.zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15155>

src/amd/addrlib/src/amdgpu_asic_addr.h

@@ -47,6 +47,8 @@
 #define FAMILY_NV      0x8F
 #define FAMILY_VGH     0x90
 #define FAMILY_YC      0x92
+#define FAMILY_GC_10_3_6  0x95
+#define FAMILY_GC_10_3_7  0x97
 
 // AMDGPU_FAMILY_IS(familyId, familyName)
 #define FAMILY_IS(f, fn)     (f == FAMILY_##fn)
@@ -111,6 +113,10 @@
 
 #define AMDGPU_YELLOW_CARP_RANGE 0x01, 0xFF
 
+#define AMDGPU_GFX1036_RANGE    0x01, 0xFF
+
+#define AMDGPU_GFX1037_RANGE    0x01, 0xFF
+
 #define AMDGPU_EXPAND_FIX(x) x
 #define AMDGPU_RANGE_HELPER(val, min, max) ((val >= min) && (val < max))
 #define AMDGPU_IN_RANGE(val, ...)   AMDGPU_EXPAND_FIX(AMDGPU_RANGE_HELPER(val, __VA_ARGS__))
@@ -168,4 +174,8 @@
 
 #define ASICREV_IS_YELLOW_CARP(r)      ASICREV_IS(r, YELLOW_CARP)
 
+#define ASICREV_IS_GFX1036(r)          ASICREV_IS(r, GFX1036)
+
+#define ASICREV_IS_GFX1037(r)          ASICREV_IS(r, GFX1037)
+
 #endif // _AMDGPU_ASIC_ADDR_H

src/amd/addrlib/src/core/addrlib.cpp

@@ -230,6 +230,8 @@ ADDR_E_RETURNCODE Lib::Create(
                     case FAMILY_NV:
                     case FAMILY_VGH:
                     case FAMILY_YC:
+                    case FAMILY_GC_10_3_6:
+                    case FAMILY_GC_10_3_7:
                         pLib = Gfx10HwlInit(&client);
                         break;
                     default:

src/amd/addrlib/src/gfx10/gfx10addrlib.cpp

@@ -1087,7 +1087,24 @@ ChipFamily Gfx10Lib::HwlConvertChipFamily(
             }
 
             break;
-
+        case FAMILY_GC_10_3_6:
+            if (ASICREV_IS_GFX1036(chipRevision))
+            {
+                m_settings.supportRbPlus   = 1;
+                m_settings.dccUnsup3DSwDis = 0;
+            }
+            break;
+        case FAMILY_GC_10_3_7:
+            if (ASICREV_IS_GFX1037(chipRevision))
+            {
+                m_settings.supportRbPlus   = 1;
+                m_settings.dccUnsup3DSwDis = 0;
+            }
+            else
+            {
+                ADDR_ASSERT(!"Unknown chip revision");
+            }
+            break;
         default:
             ADDR_ASSERT(!"Unknown chip family");
             break;

src/amd/common/ac_gpu_info.c

@@ -764,6 +764,12 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
    case FAMILY_YC:
       identify_chip(YELLOW_CARP);
       break;
+   case FAMILY_GC_10_3_6:
+      identify_chip(GFX1036);
+      break;
+   case FAMILY_GC_10_3_7:
+      identify_chip2(GFX1037, GFX1036);
+      break;
    }
 
    if (!info->name) {
@@ -1194,6 +1200,7 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
          break;
       case CHIP_VANGOGH:
       case CHIP_YELLOW_CARP:
+      case CHIP_GFX1036:
          pc_lines = 256;
          break;
       default:

src/amd/common/amd_family.c

@@ -100,6 +100,8 @@ const char *ac_get_family_name(enum radeon_family family)
       return "BEIGE_GOBY";
    case CHIP_YELLOW_CARP:
       return "YELLOW_CARP";
+   case CHIP_GFX1036:
+      return "GFX1036";
    default:
       unreachable("Unknown GPU family");
    }

src/amd/common/amd_family.h

@@ -114,6 +114,7 @@ enum radeon_family
    CHIP_DIMGREY_CAVEFISH,
    CHIP_BEIGE_GOBY,
    CHIP_YELLOW_CARP,
+   CHIP_GFX1036,
    CHIP_LAST,
 };
 

src/amd/llvm/ac_llvm_util.c

@@ -179,6 +179,7 @@ const char *ac_get_llvm_processor_name(enum radeon_family family)
    case CHIP_BEIGE_GOBY:
    case CHIP_VANGOGH:
    case CHIP_YELLOW_CARP:
+   case CHIP_GFX1036:
       return "gfx1030";
    default:
       return "";

src/gallium/drivers/radeon/radeon_vcn_dec.c

@@ -2626,6 +2626,7 @@ struct pipe_video_codec *radeon_create_decoder(struct pipe_context *context,
    case CHIP_BEIGE_GOBY:
    case CHIP_VANGOGH:
    case CHIP_YELLOW_CARP:
+   case CHIP_GFX1036:
       dec->reg.data0 = RDECODE_VCN2_5_GPCOM_VCPU_DATA0;
       dec->reg.data1 = RDECODE_VCN2_5_GPCOM_VCPU_DATA1;
       dec->reg.cmd = RDECODE_VCN2_5_GPCOM_VCPU_CMD;