etnaviv: apply feature overrides in one central location

This way we can just test the feature bits and don't need to spread
the debug overrides to all locations touching a feature.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-By: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
This commit is contained in:
Lucas Stach 2017-05-10 18:01:06 +02:00 committed by Christian Gmeiner
parent 20ce6f1361
commit f8a3991458
5 changed files with 19 additions and 10 deletions

View file

@ -111,8 +111,7 @@ etna_blit_clear_color(struct pipe_context *pctx, struct pipe_surface *dst,
if (surf->surf.ts_size) { /* TS: use precompiled clear command */
ctx->framebuffer.TS_COLOR_CLEAR_VALUE = new_clear_value;
if (!DBG_ENABLED(ETNA_DBG_NO_AUTODISABLE) &&
VIV_FEATURE(ctx->screen, chipMinorFeatures1, AUTO_DISABLE)) {
if (VIV_FEATURE(ctx->screen, chipMinorFeatures1, AUTO_DISABLE)) {
/* Set number of color tiles to be filled */
etna_set_state(ctx->stream, VIVS_TS_COLOR_AUTO_DISABLE_COUNT,
surf->surf.padded_width * surf->surf.padded_height / 16);
@ -171,8 +170,7 @@ etna_blit_clear_zs(struct pipe_context *pctx, struct pipe_surface *dst,
if (surf->surf.ts_size) { /* TS: use precompiled clear command */
/* Set new clear depth value */
ctx->framebuffer.TS_DEPTH_CLEAR_VALUE = new_clear_value;
if (!DBG_ENABLED(ETNA_DBG_NO_AUTODISABLE) &&
VIV_FEATURE(ctx->screen, chipMinorFeatures1, AUTO_DISABLE)) {
if (VIV_FEATURE(ctx->screen, chipMinorFeatures1, AUTO_DISABLE)) {
/* Set number of depth tiles to be filled */
etna_set_state(ctx->stream, VIVS_TS_DEPTH_AUTO_DISABLE_COUNT,
surf->surf.padded_width * surf->surf.padded_height / 16);

View file

@ -247,7 +247,7 @@ etna_resource_create(struct pipe_screen *pscreen,
layout = ETNA_LAYOUT_LINEAR;
} else if (templat->target != PIPE_BUFFER) {
bool want_multitiled = false;
bool want_supertiled = screen->specs.can_supertile && !DBG_ENABLED(ETNA_DBG_NO_SUPERTILE);
bool want_supertiled = screen->specs.can_supertile;
/* When this GPU supports single-buffer rendering, don't ever enable
* multi-tiling. This replicates the blob behavior on GC3000.

View file

@ -831,6 +831,16 @@ etna_screen_create(struct etna_device *dev, struct etna_gpu *gpu,
if (!etna_get_specs(screen))
goto fail;
/* apply debug options that disable individual features */
if (DBG_ENABLED(ETNA_DBG_NO_EARLY_Z))
screen->features[viv_chipFeatures] |= chipFeatures_NO_EARLY_Z;
if (DBG_ENABLED(ETNA_DBG_NO_TS))
screen->features[viv_chipFeatures] &= ~chipFeatures_FAST_CLEAR;
if (DBG_ENABLED(ETNA_DBG_NO_AUTODISABLE))
screen->features[viv_chipMinorFeatures1] &= ~chipMinorFeatures1_AUTO_DISABLE;
if (DBG_ENABLED(ETNA_DBG_NO_SUPERTILE))
screen->specs.can_supertile = 0;
pscreen->destroy = etna_screen_destroy;
pscreen->get_param = etna_screen_get_param;
pscreen->get_paramf = etna_screen_get_paramf;

View file

@ -66,7 +66,7 @@ etna_create_surface(struct pipe_context *pctx, struct pipe_resource *prsc,
if (VIV_FEATURE(ctx->screen, chipFeatures, FAST_CLEAR) &&
VIV_FEATURE(ctx->screen, chipMinorFeatures0, MC20) &&
!DBG_ENABLED(ETNA_DBG_NO_TS) && !rsc->ts_bo &&
!rsc->ts_bo &&
(rsc->levels[level].padded_width & ETNA_RS_WIDTH_MASK) == 0 &&
(rsc->levels[level].padded_height & ETNA_RS_HEIGHT_MASK) == 0) {
etna_screen_resource_alloc_ts(pctx->screen, rsc);

View file

@ -27,13 +27,17 @@
#include "etnaviv_zsa.h"
#include "etnaviv_context.h"
#include "etnaviv_screen.h"
#include "etnaviv_translate.h"
#include "util/u_memory.h"
#include "hw/common.xml.h"
void *
etna_zsa_state_create(struct pipe_context *pctx,
const struct pipe_depth_stencil_alpha_state *so)
{
struct etna_context *ctx = etna_context(pctx);
struct etna_zsa_state *cs = CALLOC_STRUCT(etna_zsa_state);
if (!cs)
@ -42,7 +46,7 @@ etna_zsa_state_create(struct pipe_context *pctx,
cs->base = *so;
/* XXX does stencil[0] / stencil[1] order depend on rs->front_ccw? */
bool early_z = true;
bool early_z = !VIV_FEATURE(ctx->screen, chipFeatures, NO_EARLY_Z);
bool disable_zs =
(!so->depth.enabled || so->depth.func == PIPE_FUNC_ALWAYS) &&
!so->depth.writemask;
@ -88,9 +92,6 @@ etna_zsa_state_create(struct pipe_context *pctx,
if (so->depth.enabled == false || so->depth.func == PIPE_FUNC_ALWAYS)
early_z = false;
if (DBG_ENABLED(ETNA_DBG_NO_EARLY_Z))
early_z = false;
/* compare funcs have 1 to 1 mapping */
cs->PE_DEPTH_CONFIG =
VIVS_PE_DEPTH_CONFIG_DEPTH_FUNC(so->depth.enabled ? so->depth.func