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freedreno/drm: Add FD_BO_NOMAP hint

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Add a hint for buffers that we won't need to mmap.  With the virtio
backend, virglrenderer needs to create a dmabuf fd for mapping into
the host, which we want to avoid when possible.

Low hanging fruit is to use this hint for anything tiled/ubwc.  There
are probably more bo's that can be flagged as such.

TODO add fd_bo_upload() for memcpy to bo.. this would be useful for
uploads, for example, shaders which we just write once and never touch
again.. for virtio this could be implemented with a TRANSFER_TO_HOST
ioctl.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14900>
This commit is contained in:
Rob Clark 2022-02-04 11:36:40 -08:00 • committed by Marge Bot
parent 598405c91f
commit f846181fe5
6 changed files with 11 additions and 5 deletions
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3
src/freedreno/drm/freedreno_bo.c
View file

@ -461,6 +461,9 @@ fd_bo_map(struct fd_bo *bo)
uint64_t offset;
int ret;
if (bo->alloc_flags & FD_BO_NOMAP)
return NULL;
ret = bo->funcs->offset(bo, &offset);
if (ret) {
return NULL;

4
src/freedreno/drm/freedreno_drmif.h
View file

@ -100,8 +100,10 @@ struct fd_fence {
/* bo flags: */
#define FD_BO_GPUREADONLY BITSET_BIT(1)
#define FD_BO_SCANOUT BITSET_BIT(2)
/* Default caching is WRITECOMBINE: */
#define FD_BO_CACHED_COHERENT BITSET_BIT(3)
/* Default caching is WRITECOMBINE */
/* Hint that the bo will not be mmap'd: */
#define FD_BO_NOMAP BITSET_BIT(4)
/* bo access flags: (keep aligned to MSM_PREP_x) */
#define FD_BO_PREP_READ BITSET_BIT(0)

2
src/gallium/drivers/freedreno/a5xx/fd5_resource.c
View file

@ -49,7 +49,7 @@ setup_lrz(struct fd_resource *rsc)
rsc->lrz_height = lrz_height;
rsc->lrz_width = lrz_pitch;
rsc->lrz_pitch = lrz_pitch;
rsc->lrz = fd_bo_new(screen->dev, size, 0, "lrz");
rsc->lrz = fd_bo_new(screen->dev, size, FD_BO_NOMAP, "lrz");
}
uint32_t

4
src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
View file

@ -429,13 +429,13 @@ update_vsc_pipe(struct fd_batch *batch)
if (!fd6_ctx->vsc_draw_strm) {
fd6_ctx->vsc_draw_strm = fd_bo_new(
ctx->screen->dev, VSC_DRAW_STRM_SIZE(fd6_ctx->vsc_draw_strm_pitch),
0, "vsc_draw_strm");
FD_BO_NOMAP, "vsc_draw_strm");
}
if (!fd6_ctx->vsc_prim_strm) {
fd6_ctx->vsc_prim_strm = fd_bo_new(
ctx->screen->dev, VSC_PRIM_STRM_SIZE(fd6_ctx->vsc_prim_strm_pitch),
0, "vsc_prim_strm");
FD_BO_NOMAP, "vsc_prim_strm");
}
OUT_REG(

2
src/gallium/drivers/freedreno/a6xx/fd6_resource.c
View file

@ -220,7 +220,7 @@ setup_lrz(struct fd_resource *rsc)
rsc->lrz_height = lrz_height;
rsc->lrz_width = lrz_pitch;
rsc->lrz_pitch = lrz_pitch;
rsc->lrz = fd_bo_new(screen->dev, size, 0, "lrz");
rsc->lrz = fd_bo_new(screen->dev, size, FD_BO_NOMAP, "lrz");
}
static uint32_t

1
src/gallium/drivers/freedreno/freedreno_resource.c
View file

@ -196,6 +196,7 @@ realloc_bo(struct fd_resource *rsc, uint32_t size)
struct pipe_resource *prsc = &rsc->b.b;
struct fd_screen *screen = fd_screen(rsc->b.b.screen);
uint32_t flags =
COND(rsc->layout.tile_mode, FD_BO_NOMAP) |
COND(prsc->usage & PIPE_USAGE_STAGING, FD_BO_CACHED_COHERENT) |
COND(prsc->bind & PIPE_BIND_SCANOUT, FD_BO_SCANOUT);
/* TODO other flags? */