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r600/sfn: Add MemRingOut instructions
Preparing support for Geometry shaders. Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
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1b17316bf3
commit
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3 changed files with 143 additions and 1 deletions
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@ -244,4 +244,89 @@ void StreamOutIntruction::do_print(std::ostream& os) const
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os << "+" << m_array_size;
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}
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MemRingOutIntruction::MemRingOutIntruction(ECFOpCode ring, EMemWriteType type,
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const GPRVector& value,
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unsigned base_addr, unsigned ncomp,
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PValue index):
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WriteoutInstruction(Instruction::ring, value),
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m_ring_op(ring),
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m_type(type),
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m_base_address(base_addr),
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m_num_comp(ncomp),
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m_index(index)
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{
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add_remappable_src_value(&m_index);
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assert(m_ring_op == cf_mem_ring || m_ring_op == cf_mem_ring1||
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m_ring_op == cf_mem_ring2 || m_ring_op == cf_mem_ring3);
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assert(m_num_comp <= 4);
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}
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unsigned MemRingOutIntruction::ncomp() const
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{
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switch (m_num_comp) {
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case 1: return 0;
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case 2: return 1;
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case 3:
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case 4: return 3;
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default:
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assert(0);
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}
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return 3;
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}
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bool MemRingOutIntruction::is_equal_to(const Instruction& lhs) const
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{
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assert(lhs.type() == streamout);
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const auto& oth = static_cast<const MemRingOutIntruction&>(lhs);
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bool equal = gpr() == oth.gpr() &&
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m_ring_op == oth.m_ring_op &&
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m_type == oth.m_type &&
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m_num_comp == oth.m_num_comp &&
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m_base_address == oth.m_base_address;
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if (m_type == mem_write_ind || m_type == mem_write_ind_ack)
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equal &= (*m_index == *oth.m_index);
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return equal;
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}
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static const char *write_type_str[4] = {"WRITE", "WRITE_IDX", "WRITE_ACK", "WRITE_IDX_ACK" };
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void MemRingOutIntruction::do_print(std::ostream& os) const
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{
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os << "MEM_RING" << m_ring_op;
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os << " " << write_type_str[m_type] << " " << m_base_address;
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os << " " << gpr();
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if (m_type == mem_write_ind || m_type == mem_write_ind_ack)
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os << " @" << *m_index;
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os << " ES:" << m_num_comp;
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}
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void MemRingOutIntruction::replace_values_child(const ValueSet& candiates,
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PValue new_value)
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{
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if (!m_index)
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return;
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for (auto c: candiates) {
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if (*c == *m_index)
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m_index = new_value;
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}
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}
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void MemRingOutIntruction::remap_registers_child(std::vector<rename_reg_pair>& map,
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ValueMap& values)
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{
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if (!m_index)
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return;
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assert(m_index->type() == Value::gpr);
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auto new_index = map[m_index->sel()];
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if (new_index.valid)
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m_index = values.get_or_inject(new_index.new_reg, m_index->chan());
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map[m_index->sel()].used = true;
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}
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}
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@ -136,7 +136,35 @@ enum EMemWriteType {
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mem_write_ind_ack = 3,
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};
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class MemRingOutIntruction: public WriteoutInstruction {
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public:
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MemRingOutIntruction(ECFOpCode ring, EMemWriteType type,
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const GPRVector& value, unsigned base_addr,
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unsigned ncomp, PValue m_index);
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unsigned op() const{return m_ring_op;}
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unsigned ncomp() const;
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unsigned addr() const {return m_base_address;}
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EMemWriteType type() const {return m_type;}
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unsigned index_reg() const {return m_index->sel();}
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unsigned array_base() const {return m_base_address; }
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void replace_values_child(const ValueSet& candiates, PValue new_value) override;
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void remap_registers_child(std::vector<rename_reg_pair>& map,
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ValueMap& values) override;
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private:
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bool is_equal_to(const Instruction& lhs) const override;
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void do_print(std::ostream& os) const override;
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ECFOpCode m_ring_op;
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EMemWriteType m_type;
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unsigned m_base_address;
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unsigned m_num_comp;
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PValue m_index;
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};
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}
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#endif // SFN_EXPORTINSTRUCTION_H
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#endif // SFN_EXPORTINSTRUCTION_H
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@ -47,6 +47,7 @@ private:
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bool emit_alu(const AluInstruction& ai, ECFAluOpCode cf_op);
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bool emit_export(const ExportInstruction & exi);
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bool emit_streamout(const StreamOutIntruction& instr);
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bool emit_memringwrite(const MemRingOutIntruction& instr);
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bool emit_tex(const TexInstruction & tex_instr);
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bool emit_vtx(const FetchInstruction& fetch_instr);
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bool emit_if_start(const IfInstruction & if_instr);
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@ -164,6 +165,8 @@ bool AssemblyFromShaderLegacyImpl::emit(const Instruction::Pointer i)
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return emit_loop_continue(static_cast<const LoopContInstruction&>(*i));
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case Instruction::streamout:
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return emit_streamout(static_cast<const StreamOutIntruction&>(*i));
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case Instruction::ring:
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return emit_memringwrite(static_cast<const MemRingOutIntruction&>(*i));
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case Instruction::wait_ack:
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return emit_wait_ack(static_cast<const WaitAck&>(*i));
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case Instruction::mem_wr_scratch:
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@ -577,6 +580,32 @@ bool AssemblyFromShaderLegacyImpl::emit_streamout(const StreamOutIntruction& so_
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return true;
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}
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bool AssemblyFromShaderLegacyImpl::emit_memringwrite(const MemRingOutIntruction& instr)
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{
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struct r600_bytecode_output output;
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memset(&output, 0, sizeof(struct r600_bytecode_output));
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output.gpr = instr.gpr().sel();
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output.type = instr.type();
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output.elem_size = instr.ncomp();
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output.comp_mask = 0xF;
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output.burst_count = 1;
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output.op = instr.op();
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if (instr.type() == mem_write_ind || instr.type() == mem_write_ind_ack) {
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output.index_gpr = instr.index_reg();
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output.array_size = 0xfff;
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}
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output.array_base = instr.array_base();
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if (r600_bytecode_add_output(m_bc, &output)) {
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R600_ERR("shader_from_nir: Error creating mem ring write instruction\n");
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return false;
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}
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return true;
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}
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bool AssemblyFromShaderLegacyImpl::emit_tex(const TexInstruction & tex_instr)
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{
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auto addr = tex_instr.sampler_offset();
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