From f7aba11a525a75d8390c8bcbf851aff96ccf76ac Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Mon, 30 Jan 2023 09:16:50 +0100 Subject: [PATCH] radv: fix RB+ for SRGB formats This should be set for linear colorspace only. Ported from RadeonSI. Cc: mesa-stable Signed-off-by: Samuel Pitoiset Part-of: (cherry picked from commit c8a575eb3098282f495948b728abd45768dc5d01) --- .pick_status.json | 2 +- src/amd/vulkan/radv_cmd_buffer.c | 4 +++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 3dd1b069646..ca3daee945b 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -4189,7 +4189,7 @@ "description": "radv: fix RB+ for SRGB formats", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null }, diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 538b3cdb771..4763e5ede54 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -1341,7 +1341,9 @@ radv_emit_rbplus_state(struct radv_cmd_buffer *cmd_buffer) spi_format == V_028714_SPI_SHADER_UINT16_ABGR || spi_format == V_028714_SPI_SHADER_SINT16_ABGR) { sx_ps_downconvert |= V_028754_SX_RT_EXPORT_8_8_8_8 << (i * 4); - sx_blend_opt_epsilon |= V_028758_8BIT_FORMAT << (i * 4); + + if (G_028C70_NUMBER_TYPE(cb->cb_color_info) != V_028C70_NUMBER_SRGB) + sx_blend_opt_epsilon |= V_028758_8BIT_FORMAT << (i * 4); } break;