radeon: correct fix for tiling with the legacy build

This commit is contained in:
Alex Deucher 2009-08-07 17:35:12 -04:00
parent a2a3d8d7f0
commit f7474a577d
2 changed files with 6 additions and 6 deletions

View file

@ -42,12 +42,6 @@
#define RADEON_BO_FLAGS_MACRO_TILE 1
#define RADEON_BO_FLAGS_MICRO_TILE 2
#define RADEON_TILING_MACRO 0x1
#define RADEON_TILING_MICRO 0x2
#define RADEON_TILING_SWAP 0x4
#define RADEON_TILING_SURFACE 0x8 /* this object requires a surface
* when mapped - i.e. front buffer */
struct radeon_bo_manager;
struct radeon_bo {

View file

@ -15,6 +15,12 @@
#define RADEON_GEM_DOMAIN_GTT 0x2 // GTT or cache flushed
#define RADEON_GEM_DOMAIN_VRAM 0x4 // VRAM domain
#define RADEON_TILING_MACRO 0x1
#define RADEON_TILING_MICRO 0x2
#define RADEON_TILING_SWAP 0x4
#define RADEON_TILING_SURFACE 0x8 /* this object requires a surface
* when mapped - i.e. front buffer */
/* to be used to build locally in mesa with no libdrm bits */
#include "../radeon/radeon_bo_drm.h"
#include "../radeon/radeon_cs_drm.h"