diff --git a/src/intel/vulkan/anv_cmd_buffer.c b/src/intel/vulkan/anv_cmd_buffer.c index 2452c515ee9..fb48825264b 100644 --- a/src/intel/vulkan/anv_cmd_buffer.c +++ b/src/intel/vulkan/anv_cmd_buffer.c @@ -666,7 +666,7 @@ anv_cmd_buffer_bind_descriptor_set(struct anv_cmd_buffer *cmd_buffer, struct anv_push_constants *push = &pipe_state->push_constants; uint64_t offset = anv_address_physical(set->desc_surface_addr) - - cmd_buffer->device->physical->va.internal_surface_state_pool.addr; + anv_physical_device_get_internal_surface_state_pool_va(cmd_buffer->device->physical)->addr; assert((offset & ~ANV_DESCRIPTOR_SET_OFFSET_MASK) == 0); push->desc_surface_offsets[set_index] &= ~ANV_DESCRIPTOR_SET_OFFSET_MASK; push->desc_surface_offsets[set_index] |= offset; diff --git a/src/intel/vulkan/anv_descriptor_set.c b/src/intel/vulkan/anv_descriptor_set.c index e046802cdd3..5d9b2a72051 100644 --- a/src/intel/vulkan/anv_descriptor_set.c +++ b/src/intel/vulkan/anv_descriptor_set.c @@ -1585,7 +1585,7 @@ anv_descriptor_set_create(struct anv_device *device, .offset = set->desc_surface_mem.offset, }; set->desc_offset = anv_address_physical(set->desc_surface_addr) - - device->physical->va.internal_surface_state_pool.addr; + anv_physical_device_get_internal_surface_state_pool_va(device->physical)->addr; enum isl_format format = anv_isl_format_for_descriptor_type(device, @@ -1860,14 +1860,14 @@ anv_push_descriptor_set_init(struct anv_cmd_buffer *cmd_buffer, &cmd_buffer->surface_state_stream; push_base_address = intel_has_extended_bindless(&pdevice->info) ? pdevice->va.push_descriptor_buffer_pool.addr : - pdevice->va.internal_surface_state_pool.addr; + anv_physical_device_get_internal_surface_state_pool_va(pdevice)->addr; } else { push_stream = pdevice->indirect_descriptors ? &cmd_buffer->indirect_push_descriptor_stream : &cmd_buffer->surface_state_stream; push_base_address = pdevice->indirect_descriptors ? pdevice->va.indirect_push_descriptor_pool.addr : - pdevice->va.internal_surface_state_pool.addr; + anv_physical_device_get_internal_surface_state_pool_va(pdevice)->addr; } uint32_t surface_size, sampler_size; diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c index 4250bf7bb3e..b9e0f206538 100644 --- a/src/intel/vulkan/anv_device.c +++ b/src/intel/vulkan/anv_device.c @@ -373,12 +373,12 @@ anv_device_init_descriptors_view(struct anv_device *device) device->isl_dev.ss.size, 64); const uint64_t size = - pdevice->va.internal_surface_state_pool.size + + anv_physical_device_get_internal_surface_state_pool_va(pdevice)->size + anv_physical_device_get_bindless_surface_state_pool_va(pdevice)->size; isl_buffer_fill_state(&device->isl_dev, device->descriptor_view_state.map, - .address = pdevice->va.internal_surface_state_pool.addr, + .address = anv_physical_device_get_internal_surface_state_pool_va(pdevice)->addr, .size_B = size, .mocs = anv_mocs(device, NULL, ISL_SURF_USAGE_CONSTANT_BUFFER_BIT), .format = ISL_FORMAT_RAW, @@ -546,18 +546,18 @@ anv_state_pools_init(struct anv_device *device) result = anv_state_pool_init(&device->internal_surface_state_pool, device, &(struct anv_state_pool_params) { .name = "internal surface state pool", - .base_address = device->physical->va.internal_surface_state_pool.addr, + .base_address = anv_physical_device_get_internal_surface_state_pool_va(device->physical)->addr, .start_offset = device->physical->va.scratch_surface_state_pool.size, .block_size = 4096, - .max_size = device->physical->va.internal_surface_state_pool.size, + .max_size = anv_physical_device_get_internal_surface_state_pool_va(device->physical)->size, }); } else { result = anv_state_pool_init(&device->internal_surface_state_pool, device, &(struct anv_state_pool_params) { .name = "internal surface state pool", - .base_address = device->physical->va.internal_surface_state_pool.addr, + .base_address = anv_physical_device_get_internal_surface_state_pool_va(device->physical)->addr, .block_size = 4096, - .max_size = device->physical->va.internal_surface_state_pool.size, + .max_size = anv_physical_device_get_internal_surface_state_pool_va(device->physical)->size, }); } if (result != VK_SUCCESS) @@ -592,17 +592,17 @@ anv_state_pools_init(struct anv_device *device) * offsets from the binding table location. */ assert(device->physical->va.binding_table_pool.addr < - device->physical->va.internal_surface_state_pool.addr); + anv_physical_device_get_internal_surface_state_pool_va(device->physical)->addr); int64_t bt_pool_offset = (int64_t)device->physical->va.binding_table_pool.addr - - (int64_t)device->physical->va.internal_surface_state_pool.addr; + (int64_t)anv_physical_device_get_internal_surface_state_pool_va(device->physical)->addr; assert(INT32_MIN < bt_pool_offset && bt_pool_offset < 0); result = anv_state_pool_init(&device->binding_table_pool, device, &(struct anv_state_pool_params) { .name = "binding table pool", - .base_address = device->physical->va.internal_surface_state_pool.addr, + .base_address = anv_physical_device_get_internal_surface_state_pool_va(device->physical)->addr, .start_offset = bt_pool_offset, .block_size = 64 * 1024, - .max_size = device->physical->va.internal_surface_state_pool.size, + .max_size = anv_physical_device_get_internal_surface_state_pool_va(device->physical)->size, }); } if (result != VK_SUCCESS) @@ -805,7 +805,7 @@ VkResult anv_CreateDevice( decoder->engine = physical_device->queue.families[i].engine_class; decoder->dynamic_base = physical_device->va.dynamic_state_pool.addr; - decoder->surface_base = physical_device->va.internal_surface_state_pool.addr; + decoder->surface_base = anv_physical_device_get_internal_surface_state_pool_va(physical_device)->addr; decoder->instruction_base = physical_device->va.shader_heap.addr; } } diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h index 5ba00cb48e5..6d64ce9c576 100644 --- a/src/intel/vulkan/anv_private.h +++ b/src/intel/vulkan/anv_private.h @@ -1731,6 +1731,12 @@ anv_physical_device_get_dynamic_visible_pool_va(const struct anv_physical_device return &pdevice->va.dynamic_visible_pool; } +static inline const struct anv_va_range * +anv_physical_device_get_internal_surface_state_pool_va(const struct anv_physical_device *pdevice) +{ + return &pdevice->va.internal_surface_state_pool; +} + VkResult anv_physical_device_try_create(struct vk_instance *vk_instance, struct _drmDevice *drm_device, struct vk_physical_device **out); @@ -2901,7 +2907,7 @@ anv_null_surface_state_for_binding_table(struct anv_device *device) struct anv_state state = device->null_surface_state; if (device->physical->indirect_descriptors) { state.offset += anv_physical_device_get_bindless_surface_state_pool_va(device->physical)->addr - - device->physical->va.internal_surface_state_pool.addr; + anv_physical_device_get_internal_surface_state_pool_va(device->physical)->addr; } return state; } @@ -2911,7 +2917,7 @@ anv_bindless_state_for_binding_table(struct anv_device *device, struct anv_state state) { state.offset += anv_physical_device_get_bindless_surface_state_pool_va(device->physical)->addr - - device->physical->va.internal_surface_state_pool.addr; + anv_physical_device_get_internal_surface_state_pool_va(device->physical)->addr; return state; } diff --git a/src/intel/vulkan/anv_shader.c b/src/intel/vulkan/anv_shader.c index fb435106522..6df28dfb7a5 100644 --- a/src/intel/vulkan/anv_shader.c +++ b/src/intel/vulkan/anv_shader.c @@ -600,12 +600,12 @@ anv_shader_set_relocs(struct anv_device *device, .value = anv_physical_device_get_indirect_descriptor_pool_va(device->physical)->addr >> 32, }; assert((anv_physical_device_get_indirect_descriptor_pool_va(device->physical)->addr & 0xffffffff) == 0); - assert((device->physical->va.internal_surface_state_pool.addr & 0xffffffff) == 0); + assert((anv_physical_device_get_internal_surface_state_pool_va(device->physical)->addr & 0xffffffff) == 0); reloc_values[rv_count++] = (struct intel_shader_reloc_value) { .id = BRW_SHADER_RELOC_DESCRIPTORS_ADDR_HIGH, .value = device->physical->indirect_descriptors ? (anv_physical_device_get_indirect_descriptor_pool_va(device->physical)->addr >> 32) : - (device->physical->va.internal_surface_state_pool.addr >> 32), + (anv_physical_device_get_internal_surface_state_pool_va(device->physical)->addr >> 32), }; assert((device->physical->va.shader_heap.addr & 0xffffffff) == 0); reloc_values[rv_count++] = (struct intel_shader_reloc_value) { diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index d2e57756592..fbf79526600 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++ b/src/intel/vulkan/genX_cmd_buffer.c @@ -148,7 +148,7 @@ fill_state_base_addr(struct anv_cmd_buffer *cmd_buffer, #if GFX_VERx10 >= 125 sba->SurfaceStateBaseAddress = (struct anv_address) { .offset = - device->physical->va.internal_surface_state_pool.addr, + anv_physical_device_get_internal_surface_state_pool_va(device->physical)->addr, }; #else sba->SurfaceStateBaseAddress = @@ -231,10 +231,10 @@ fill_state_base_addr(struct anv_cmd_buffer *cmd_buffer, } else if (!device->physical->indirect_descriptors) { #if GFX_VERx10 >= 125 sba->BindlessSurfaceStateBaseAddress = (struct anv_address) { - .offset = device->physical->va.internal_surface_state_pool.addr, + .offset = anv_physical_device_get_internal_surface_state_pool_va(device->physical)->addr, }; sba->BindlessSurfaceStateSize = - (device->physical->va.internal_surface_state_pool.size + + (anv_physical_device_get_internal_surface_state_pool_va(device->physical)->size + anv_physical_device_get_bindless_surface_state_pool_va(device->physical)->size) - 1; sba->BindlessSurfaceStateMOCS = mocs; sba->BindlessSurfaceStateBaseAddressModifyEnable = true; @@ -3358,7 +3358,7 @@ update_descriptor_set_surface_state(struct anv_cmd_buffer *cmd_buffer, const struct anv_va_range *push_va_range = GFX_VERx10 >= 125 ? &device->va.push_descriptor_buffer_pool : - &device->va.internal_surface_state_pool; + anv_physical_device_get_internal_surface_state_pool_va(device); const struct anv_va_range *va_range = buffer_index == -1 ? push_va_range : anv_physical_device_get_dynamic_visible_pool_va(device); const uint64_t descriptor_set_addr = diff --git a/src/intel/vulkan/genX_init_state.c b/src/intel/vulkan/genX_init_state.c index 5d764144c05..ed43b48548b 100644 --- a/src/intel/vulkan/genX_init_state.c +++ b/src/intel/vulkan/genX_init_state.c @@ -263,7 +263,7 @@ init_common_queue_state(struct anv_queue *queue, struct anv_batch *batch) sba.SurfaceStateBaseAddress = (struct anv_address) { .offset = - device->physical->va.internal_surface_state_pool.addr, + anv_physical_device_get_internal_surface_state_pool_va(device->physical)->addr, }; sba.SurfaceStateMOCS = mocs; sba.SurfaceStateBaseAddressModifyEnable = true; @@ -317,10 +317,10 @@ init_common_queue_state(struct anv_queue *queue, struct anv_batch *batch) * same heap */ sba.BindlessSurfaceStateBaseAddress = (struct anv_address) { - .offset = device->physical->va.internal_surface_state_pool.addr, + .offset = anv_physical_device_get_internal_surface_state_pool_va(device->physical)->addr, }; sba.BindlessSurfaceStateSize = - (device->physical->va.internal_surface_state_pool.size + + (anv_physical_device_get_internal_surface_state_pool_va(device->physical)->size + anv_physical_device_get_bindless_surface_state_pool_va(device->physical)->size) - 1; sba.BindlessSurfaceStateMOCS = mocs; sba.BindlessSurfaceStateBaseAddressModifyEnable = true; @@ -347,7 +347,7 @@ init_common_queue_state(struct anv_queue *queue, struct anv_batch *batch) mi_builder_init(&b, device->info, batch); mi_store(&b, mi_reg64(ANV_BINDLESS_SURFACE_BASE_ADDR_REG), - mi_imm(device->physical->va.internal_surface_state_pool.addr)); + mi_imm(anv_physical_device_get_internal_surface_state_pool_va(device->physical)->addr)); #endif /* GFX_VER >= 12 */ #if GFX_VERx10 >= 125