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intel/vec4: Reswizzle VF immediates too

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Previously, an instruction like

mul(8) vgrf29.xy:F, vgrf25.yxxx:F, [-1F, 1F, 0F, 0F]

would get rewritten as

mul(8) vgrf0.yz:F, vgrf25.yyxx:F, [-1F, 1F, 0F, 0F]

The latter does not produce the correct result.  The VF immediate in the
second should be either [-1F, -1F, 1F, 1F] or [0F, -1F, 1F, 0F].  This
commit produces the former.

Fixes: 1ee1d8ab46 ("i965/vec4: Reswizzle sources when necessary.")
Reviewed-by: Matt Turner <mattst88@gmail.com>
(cherry picked from commit 47c2aa5b48)
This commit is contained in:
Ian Romanick 2019-06-12 13:19:25 -07:00 • committed by Juan A. Suarez Romero
parent e9e63bfba8
commit f6c032c615
1 changed files with 23 additions and 1 deletions
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24
src/intel/compiler/brw_vec4.cpp
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@ -1204,9 +1204,31 @@ vec4_instruction::reswizzle(int dst_writemask, int swizzle)
opcode != BRW_OPCODE_DP3 && opcode != BRW_OPCODE_DP2 &&
opcode != VEC4_OPCODE_PACK_BYTES) {
for (int i = 0; i < 3; i++) {
if (src[i].file == BAD_FILE || src[i].file == IMM)
if (src[i].file == BAD_FILE)
continue;
if (src[i].file == IMM) {
assert(src[i].type != BRW_REGISTER_TYPE_V &&
src[i].type != BRW_REGISTER_TYPE_UV);
/* Vector immediate types need to be reswizzled. */
if (src[i].type == BRW_REGISTER_TYPE_VF) {
const unsigned imm[] = {
(src[i].ud >> 0) & 0x0ff,
(src[i].ud >> 8) & 0x0ff,
(src[i].ud >> 16) & 0x0ff,
(src[i].ud >> 24) & 0x0ff,
};
src[i] = brw_imm_vf4(imm[BRW_GET_SWZ(swizzle, 0)],
imm[BRW_GET_SWZ(swizzle, 1)],
imm[BRW_GET_SWZ(swizzle, 2)],
imm[BRW_GET_SWZ(swizzle, 3)]);
}
continue;
}
src[i].swizzle = brw_compose_swizzle(swizzle, src[i].swizzle);
}
}