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radv: Move NIR helpers from radv_meta.c to radv_meta_nir.c
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33494>
This commit is contained in:
Timur Kristóf
Marge Bot
parent
c093b03213
commit
f6a02d034b
2 changed files with 113 additions and 113 deletions
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@ -376,119 +376,6 @@ radv_device_finish_meta(struct radv_device *device)
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vk_meta_device_finish(&device->vk, &device->meta_state.device);
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}
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nir_builder PRINTFLIKE(3, 4)
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radv_meta_init_shader(struct radv_device *dev, gl_shader_stage stage, const char *name, ...)
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{
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const struct radv_physical_device *pdev = radv_device_physical(dev);
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nir_builder b = nir_builder_init_simple_shader(stage, NULL, NULL);
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if (name) {
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va_list args;
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va_start(args, name);
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b.shader->info.name = ralloc_vasprintf(b.shader, name, args);
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va_end(args);
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}
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b.shader->options = &pdev->nir_options[stage];
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radv_device_associate_nir(dev, b.shader);
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return b;
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}
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/* vertex shader that generates vertices */
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nir_shader *
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radv_meta_build_nir_vs_generate_vertices(struct radv_device *dev)
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{
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const struct glsl_type *vec4 = glsl_vec4_type();
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nir_variable *v_position;
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nir_builder b = radv_meta_init_shader(dev, MESA_SHADER_VERTEX, "meta_vs_gen_verts");
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nir_def *outvec = nir_gen_rect_vertices(&b, NULL, NULL);
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v_position = nir_variable_create(b.shader, nir_var_shader_out, vec4, "gl_Position");
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v_position->data.location = VARYING_SLOT_POS;
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nir_store_var(&b, v_position, outvec, 0xf);
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return b.shader;
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}
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nir_shader *
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radv_meta_build_nir_fs_noop(struct radv_device *dev)
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{
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return radv_meta_init_shader(dev, MESA_SHADER_FRAGMENT, "meta_noop_fs").shader;
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}
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void
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radv_meta_build_resolve_shader_core(struct radv_device *device, nir_builder *b, bool is_integer, int samples,
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nir_variable *input_img, nir_variable *color, nir_def *img_coord)
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{
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const struct radv_physical_device *pdev = radv_device_physical(device);
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nir_deref_instr *input_img_deref = nir_build_deref_var(b, input_img);
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nir_def *sample0 = nir_txf_ms_deref(b, input_img_deref, img_coord, nir_imm_int(b, 0));
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if (is_integer || samples <= 1) {
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nir_store_var(b, color, sample0, 0xf);
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return;
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}
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if (pdev->use_fmask) {
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nir_def *all_same = nir_samples_identical_deref(b, input_img_deref, img_coord);
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nir_push_if(b, nir_inot(b, all_same));
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}
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nir_def *accum = sample0;
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for (int i = 1; i < samples; i++) {
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nir_def *sample = nir_txf_ms_deref(b, input_img_deref, img_coord, nir_imm_int(b, i));
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accum = nir_fadd(b, accum, sample);
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}
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accum = nir_fdiv_imm(b, accum, samples);
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nir_store_var(b, color, accum, 0xf);
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if (pdev->use_fmask) {
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nir_push_else(b, NULL);
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nir_store_var(b, color, sample0, 0xf);
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nir_pop_if(b, NULL);
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}
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}
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nir_def *
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radv_meta_load_descriptor(nir_builder *b, unsigned desc_set, unsigned binding)
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{
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nir_def *rsrc = nir_vulkan_resource_index(b, 3, 32, nir_imm_int(b, 0), .desc_set = desc_set, .binding = binding);
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return nir_trim_vector(b, rsrc, 2);
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}
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nir_def *
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get_global_ids(nir_builder *b, unsigned num_components)
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{
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unsigned mask = BITFIELD_MASK(num_components);
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nir_def *local_ids = nir_channels(b, nir_load_local_invocation_id(b), mask);
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nir_def *block_ids = nir_channels(b, nir_load_workgroup_id(b), mask);
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nir_def *block_size =
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nir_channels(b,
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nir_imm_ivec4(b, b->shader->info.workgroup_size[0], b->shader->info.workgroup_size[1],
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b->shader->info.workgroup_size[2], 0),
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mask);
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return nir_iadd(b, nir_imul(b, block_ids, block_size), local_ids);
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}
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void
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radv_break_on_count(nir_builder *b, nir_variable *var, nir_def *count)
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{
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nir_def *counter = nir_load_var(b, var);
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nir_break_if(b, nir_uge(b, counter, count));
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counter = nir_iadd_imm(b, counter, 1);
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nir_store_var(b, var, counter, 0x1);
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}
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VkResult
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radv_meta_get_noop_pipeline_layout(struct radv_device *device, VkPipelineLayout *layout_out)
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{
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@ -14,6 +14,119 @@
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#include "nir/nir_format_convert.h"
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#include "nir_builder.h"
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nir_builder PRINTFLIKE(3, 4)
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radv_meta_init_shader(struct radv_device *dev, gl_shader_stage stage, const char *name, ...)
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{
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const struct radv_physical_device *pdev = radv_device_physical(dev);
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nir_builder b = nir_builder_init_simple_shader(stage, NULL, NULL);
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if (name) {
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va_list args;
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va_start(args, name);
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b.shader->info.name = ralloc_vasprintf(b.shader, name, args);
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va_end(args);
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}
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b.shader->options = &pdev->nir_options[stage];
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radv_device_associate_nir(dev, b.shader);
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return b;
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}
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/* vertex shader that generates vertices */
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nir_shader *
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radv_meta_build_nir_vs_generate_vertices(struct radv_device *dev)
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{
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const struct glsl_type *vec4 = glsl_vec4_type();
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nir_variable *v_position;
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nir_builder b = radv_meta_init_shader(dev, MESA_SHADER_VERTEX, "meta_vs_gen_verts");
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nir_def *outvec = nir_gen_rect_vertices(&b, NULL, NULL);
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v_position = nir_variable_create(b.shader, nir_var_shader_out, vec4, "gl_Position");
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v_position->data.location = VARYING_SLOT_POS;
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nir_store_var(&b, v_position, outvec, 0xf);
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return b.shader;
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}
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nir_shader *
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radv_meta_build_nir_fs_noop(struct radv_device *dev)
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{
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return radv_meta_init_shader(dev, MESA_SHADER_FRAGMENT, "meta_noop_fs").shader;
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}
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void
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radv_meta_build_resolve_shader_core(struct radv_device *device, nir_builder *b, bool is_integer, int samples,
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nir_variable *input_img, nir_variable *color, nir_def *img_coord)
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{
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const struct radv_physical_device *pdev = radv_device_physical(device);
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nir_deref_instr *input_img_deref = nir_build_deref_var(b, input_img);
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nir_def *sample0 = nir_txf_ms_deref(b, input_img_deref, img_coord, nir_imm_int(b, 0));
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if (is_integer || samples <= 1) {
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nir_store_var(b, color, sample0, 0xf);
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return;
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}
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if (pdev->use_fmask) {
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nir_def *all_same = nir_samples_identical_deref(b, input_img_deref, img_coord);
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nir_push_if(b, nir_inot(b, all_same));
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}
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nir_def *accum = sample0;
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for (int i = 1; i < samples; i++) {
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nir_def *sample = nir_txf_ms_deref(b, input_img_deref, img_coord, nir_imm_int(b, i));
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accum = nir_fadd(b, accum, sample);
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}
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accum = nir_fdiv_imm(b, accum, samples);
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nir_store_var(b, color, accum, 0xf);
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if (pdev->use_fmask) {
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nir_push_else(b, NULL);
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nir_store_var(b, color, sample0, 0xf);
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nir_pop_if(b, NULL);
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}
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}
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nir_def *
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radv_meta_load_descriptor(nir_builder *b, unsigned desc_set, unsigned binding)
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{
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nir_def *rsrc = nir_vulkan_resource_index(b, 3, 32, nir_imm_int(b, 0), .desc_set = desc_set, .binding = binding);
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return nir_trim_vector(b, rsrc, 2);
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}
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nir_def *
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get_global_ids(nir_builder *b, unsigned num_components)
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{
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unsigned mask = BITFIELD_MASK(num_components);
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nir_def *local_ids = nir_channels(b, nir_load_local_invocation_id(b), mask);
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nir_def *block_ids = nir_channels(b, nir_load_workgroup_id(b), mask);
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nir_def *block_size =
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nir_channels(b,
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nir_imm_ivec4(b, b->shader->info.workgroup_size[0], b->shader->info.workgroup_size[1],
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b->shader->info.workgroup_size[2], 0),
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mask);
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return nir_iadd(b, nir_imul(b, block_ids, block_size), local_ids);
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}
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void
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radv_break_on_count(nir_builder *b, nir_variable *var, nir_def *count)
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{
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nir_def *counter = nir_load_var(b, var);
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nir_break_if(b, nir_uge(b, counter, count));
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counter = nir_iadd_imm(b, counter, 1);
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nir_store_var(b, var, counter, 0x1);
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}
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nir_shader *
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radv_meta_nir_build_buffer_fill_shader(struct radv_device *dev)
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{
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