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ir3: Split out max_branchstack and branchstack_size
One is the maximum size per wave and the other is the size per uSP (i.e. "core"). They happened to be the same before, but actually they are different limits in the HW. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39468>
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4 changed files with 7 additions and 3 deletions
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@ -209,12 +209,12 @@ ir3_should_double_threadsize(struct ir3_shader_variant *v, unsigned regs_count)
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if (v->shader_options.real_wavesize == IR3_DOUBLE_ONLY)
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return true;
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/* We can't support more than compiler->branchstack_size diverging threads
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/* We can't support more than compiler->max_branchstack diverging threads
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* in a wave. Thus, doubling the threadsize is only possible if we don't
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* exceed the branchstack size limit.
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*/
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if (MIN2(v->branchstack, compiler->info->threadsize_base * 2) >
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compiler->branchstack_size) {
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compiler->max_branchstack) {
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return false;
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}
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@ -167,6 +167,7 @@ ir3_compiler_create(struct fd_device *dev, const struct fd_dev_id *dev_id,
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/* TODO see if older GPU's were different here */
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compiler->branchstack_size = 64;
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compiler->max_branchstack = 64;
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compiler->max_variable_workgroup_size = 1024;
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@ -164,6 +164,9 @@ struct ir3_compiler {
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/* The number of total branch stack entries, divided by wave_granularity. */
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uint32_t branchstack_size;
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/* The maximum number of branch stack entries per wave. */
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uint32_t max_branchstack;
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/* The byte increment of MEMSIZEPERITEM, the private memory per-fiber allocation. */
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uint32_t pvtmem_per_fiber_align;
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@ -1458,7 +1458,7 @@ ir3_shader_branchstack_hw(const struct ir3_shader_variant *v)
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if (v->compiler->gen < 5)
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return v->branchstack;
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return align(MIN2(v->branchstack, v->compiler->branchstack_size), 2);
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return align(MIN2(v->branchstack, v->compiler->max_branchstack), 2);
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}
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ENDC;
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